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24LC64T-I/MSG

更新时间： 2024-02-27 04:39:10
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
12页 184K
描述
8K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8, ROHS COMPLIANT, PLASTIC, MSOP-8

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中文翻译

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24LC64T-I/MSG 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：4.40 MM, ROHS COMPLIANT, PLASTIC, TSSOP-8针数：8
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.32.00.51Factory Lead Time：6 weeks
风险等级：1.02Is Samacsys：N
其他特性：DATA RETENTION > 200 YEARS; 1000000 ERASE/WRITE CYCLES GUARANTEED最大时钟频率 (fCLK)：0.4 MHz
数据保留时间-最小值：200耐久性：1000000 Write/Erase Cycles
I2C控制字节：1010DDDRJESD-30 代码：R-PDSO-G8
JESD-609代码：e3长度：4.4 mm
内存密度：65536 bit内存集成电路类型：EEPROM
内存宽度：8湿度敏感等级：1
功能数量：1端子数量：8
字数：8192 words字数代码：8000
工作模式：SYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：8KX8
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP8,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行：SERIAL
峰值回流温度（摄氏度）：260电源：2/5 V
认证状态：Not Qualified座面最大高度：1.1 mm
串行总线类型：I2C最大待机电流：0.000001 A
子类别：EEPROMs最大压摆率：0.003 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：3 mm
最长写入周期时间 (tWC)：5 ms写保护：HARDWARE
Base Number Matches：1

24LC64T-I/MSG 数据手册

 浏览型号24LC64T-I/MSG的Datasheet PDF文件第3页浏览型号24LC64T-I/MSG的Datasheet PDF文件第4页浏览型号24LC64T-I/MSG的Datasheet PDF文件第5页浏览型号24LC64T-I/MSG的Datasheet PDF文件第7页浏览型号24LC64T-I/MSG的Datasheet PDF文件第8页浏览型号24LC64T-I/MSG的Datasheet PDF文件第9页 
24AA64/24LC64  
FIGURE 5-1: CONTROL BYTE FORMAT  
5.0  
DEVICE ADDRESSING  
A control byte is the first byte received following the  
start condition from the master device (Figure 5-1).The  
control byte consists of a four bit control code; for the  
24xx64 this is set as 1010 binary for read and write  
operations. The next three bits of the control byte are  
the chip select bits (A2, A1, A0). The chip select bits  
allow the use of up to eight 24xx64 devices on the  
same bus and are used to select which device is  
accessed. The chip select bits in the control byte must  
correspond to the logic levels on the corresponding A2,  
A1, and A0 pins for the device to respond. These bits  
are in effect the three most significant bits of the word  
address.  
Read/Write Bit  
Chip Select  
Control Code  
Bits  
S
1
0
1
0
A2 A1 A0 R/W ACK  
Slave Address  
Acknowledge Bit  
Start Bit  
The last bit of the control byte defines the operation to  
be performed. When set to a one a read operation is  
selected, and when set to a zero a write operation is  
selected. The next two bytes received define the  
address of the first data byte (Figure 5-2). Because  
only A12...A0 are used, the upper three address bits  
are don’t care bits. The upper address bits are trans-  
ferred first, followed by the less significant bits.  
5.1  
Contiguous Addressing Across  
Multiple Devices  
The chip select bits A2, A1, A0 can be used to expand  
the contiguous address space for up to 512K bits by  
adding up to eight 24xx64's on the same bus. In this  
case, software can use A0 of the control byte as  
address bit A13, A1 as address bit A14, and A2 as  
address bit A15. It is not possible to sequentially read  
across device boundaries.  
Following the start condition, the 24xx64 monitors the  
SDA bus checking the device type identifier being  
transmitted. Upon receiving a 1010 code and appropri-  
ate device select bits, the slave device outputs an  
acknowledge signal on the SDA line. Depending on the  
state of the R/W bit, the 24xx64 will select a read or  
write operation.  
FIGURE 5-2: ADDRESS SEQUENCE BIT ASSIGNMENTS  
CONTROL BYTE  
ADDRESS HIGH BYTE  
ADDRESS LOW BYTE  
A
A
2
A
1
A
0
A
A
10  
A
9
A
8
A
7
A
0
•
•
•
•
•
•
1
0
1
0
R/W  
X
X
X
12 11  
CONTROL  
CODE  
CHIP  
SELECT  
BITS  
X = Don’t Care Bit  
DS21189B-page 6  
1998 Microchip Technology Inc.  
 
 
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24LC64T-I/MSG 替代型号

型号 品牌 替代类型 描述 数据表
24LC64-I/MSG MICROCHIP

类似代替

 8K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8, ROHS COMPLIANT, PLASTIC, MSOP-8
24LC64-I/MS MICROCHIP

类似代替

 64K I2C⑩ Serial EEPROM

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