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24FC128E/ST PDF预览

24FC128E/ST

更新时间: 2024-11-05 23:19:15
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其他 - ETC 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
28页 553K
描述
EEPROM

24FC128E/ST 数据手册

 浏览型号24FC128E/ST的Datasheet PDF文件第2页浏览型号24FC128E/ST的Datasheet PDF文件第3页浏览型号24FC128E/ST的Datasheet PDF文件第4页浏览型号24FC128E/ST的Datasheet PDF文件第5页浏览型号24FC128E/ST的Datasheet PDF文件第6页浏览型号24FC128E/ST的Datasheet PDF文件第7页 
24AA128/24LC128/24FC128  
M
128K I2CCMOS Serial EEPROM  
Features  
Description  
• Low power CMOS technology  
The Microchip Technology Inc. 24AA128/24LC128/  
24FC128 (24XX128*) is a 16K x 8 (128 Kbit) Serial  
Electrically Erasable PROM (EEPROM), capable of  
operation across a broad voltage range (1.8 V to  
5.5 V). It has been developed for advanced, low power  
applications such as personal communications or data  
acquisition. This device also has a page-write capabil-  
ity of up to 64 bytes of data. This device is capable of  
both random and sequential reads up to the 128K  
boundary. Functional address lines allow up to eight  
devices on the same bus, for up to 1 Mbit address  
space. This device is available in the standard 8-pin  
plastic DIP, SOIC (150 and 208 mil), TSSOP, MSOP,  
DFN and 14-lead TSSOP packages.  
- Maximum write current 3 mA at 5.5 V  
- Maximum read current 400 µA at 5.5 V  
- Standby current 100 nA typical at 5.5 V  
• 2-wire serial interface bus, I2C™ compatible  
• Cascadable for up to eight devices  
• Self-timed ERASE/WRITE cycle  
• 64-byte page-write mode available  
• 5 ms max write-cycle time  
• Hardware write protect for entire array  
• Output slope control to eliminate ground bounce  
• Schmitt trigger inputs for noise suppression  
• 1,000,000 erase/write cycles  
Block Diagram  
• Electrostatic discharge protection > 4000 V  
• Data retention > 200 years  
• 8-pin PDIP, SOIC, TSSOP, MSOP and DFN  
packages  
A0 A1 A2WP  
HV GENERATOR  
• 14-lead TSSOP package  
I/O  
MEMORY  
CONTROL  
LOGIC  
EEPROM  
ARRAY  
CONTROL  
LOGIC  
XDEC  
Temperature ranges:  
- Industrial (I):  
-40°C to +85°C  
-40°C to +125°C  
PAGE LATCHES  
- Automotive (E):  
I/O  
SCL  
Device Selection Table  
YDEC  
SDA  
Part  
VCC  
Max. Clock  
Frequency  
Temp.  
Number  
Range  
Ranges  
VCC  
VSS  
(1)  
24AA128  
1.8-5.5 V  
400 kHz  
I
SENSE AMP  
R/W CONTROL  
24LC128  
24FC128  
2.5-5.5 V  
2.5-5.5 V  
400 kHz  
1 MHz  
I, E  
I
Note 1: 100 kHz for VCC < 2.5 V.  
Package Types  
PDIP/SOIC  
TSSOP/MSOP *  
TSSOP  
DFN  
14  
13  
12  
11  
10  
9
1
VCC  
WP  
NC  
NC  
NC  
SCL  
SDA  
A0  
A0  
1
8
VCC  
1
2
3
4
A0  
A1  
8
7
6
5
VCC  
WP  
1
2
3
4
8
7
6
5
A0  
A1  
VCC  
WP  
2
3
4
5
6
7
A1  
A1  
A2  
2
3
4
7
6
5
WP  
NC  
NC  
NC  
A2  
A2  
SCL  
SDA  
SCL  
SDA  
A2  
SCL  
SDA  
VSS  
VSS  
VSS  
8
VSS  
* Pins A0 and A1 are no connects for the MSOP package only.  
*24XX128 is used in this document as a generic part number for the 24AA128/24LC128/24FC128 devices.  
2002 Microchip Technology Inc.  
DS21191J-page 1  

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