Datasheet > 24C256

24C256

更新时间： 2022-11-27 07:53:11

品牌	Logo	应用领域
美国芯成 - ISSI		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
12页	53K
描述
262,144-bit 2-WIRE SERIAL CMOS EEPROM

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数据手册

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24C256 数据手册

IS24C256

ISSI

PIN CONFIGURATION

8-Pin DIP and SOIC

14-pin TSSOP

VCC

SCL

SDA

GND

SCL

SDA

PIN DESCRIPTIONS

A0-A2

SDA

SCL

Address Inputs

drain output and can be wire Or'ed with other open drain

or open collector outputs. The SDA bus requires a pullup

resistor to Vcc.

Serial Address/Data I/O

Serial Clock Input

Write Protect Input

Power Supply

A0, A1, A2

Vcc

The A0, A1, and A2 are the device address inputs that are

hardwired or left not connected for hardware compatibility

with the IS24C32/64/128. When pins are hardwired, as

manyaseight256Kdevicesmaybeaddressedonasingle

bus system. When the pins are not hardwired, the default

A0, A1, and A2 are zero.

No Connect

GND

Ground

SCL

This input clock pin is used to synchronize the data

transfer to and from the device.

WP is the Write Protect pin. If the WP pin is tied to Vcc

the entire array becomes Write Protected (Read only).

When WP is tied to GND or left floating, normal read/write

operations are allowed to the device.

SDA

The SDA is a Bi-directional pin used to transfer addresses

anddataintoandoutofthedevice. TheSDApinisanopen

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

ADVANCEDINFORMATION Rev. 00A

03/11/03

1 234 5 6 7...12

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