Datasheet > 240VA

240VA

更新时间： 2024-01-29 04:22:10

品牌	Logo	应用领域
莱迪思 - LATTICE		/
页数	文件大小	规格书
25页	324K
描述
In-System Programmable 3.3V Generic Digital CrosspointTM

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中文翻译

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技术参数
数据手册

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240VA 技术参数

生命周期：	Active	Reach Compliance Code：	unknown
风险等级：	5.81	其他特性：	VSWR MAX AT 6 GHZ
特性阻抗：	50 Ω	连接器类型：	RF TNC CONNECTOR
联系完成配合：	NOT SPECIFIED	触点性别：	MALE
耦合类型：	THREADED	DIN 符合性：	NO
滤波功能：	NO	IEC 符合性：	NO
插入损耗：	0.12 dB	MIL 符合性：	NO
安装方式：	RIGHT ANGLE	安装类型：	CABLE
最大工作频率：	6 GHz	选件：	GENERAL PURPOSE
面板安装：	NO	端接类型：	CRIMP SOLDER
电压驻波比：	1.21	Base Number Matches：	1

240VA 数据手册

Specifications ispGDX240VA

Applications (Continued)

Figure 5. Address Demultiplex/Data Buffering

Designing with the ispGDXVA

As mentioned earlier, this architecture satisfies the PRSI

class of applications without restrictions: any I/O pin as a

single input or bidirectional can drive any other I/O pin as

output.

XCVR

I/OA

I/OB

Buffered

Data

OEA

OEB

ForthecaseofPDPapplications, thedesignerdoeshave

to take into consideration the limitations on pins that can

be used as control (MUX0, MUX1, OE, CLK) or data

(MUXA-D) inputs. The restrictions on control inputs are

not likely to cause any major design issues because the

input possibilities span 25% of the total pins.

To Memory/

Peripherals

Address

Latch

Address

CLK

The MUXA-D input partitioning requires that designers

consciously assign pinouts so that MUX inputs are in the

appropriate, disjoint groups. For example, since the

MUXA group includes I/O A0-39 (240 I/O device), it is not

possible to use I/O A0 and I/O A9 in the same MUX

function. As previously discussed, data path functions

will be assigned early in the design process and these

restrictions are reasonable in order to optimize speed

and cost.

Figure 6. Data Bus Byte Swapper

XCVR

D0-7

I/OA I/OB

XCVR

OEA OEB

I/OA I/OB

User Electronic Signature

OEA OEB

The ispGDXVA Family includes dedicated User Elec-

tronic Signature (UES) E CMOS storage to allow users

XCVR

D8-15

I/OA I/OB

to code design-specific information into the devices to

identify particular manufacturing dates, code revisions,

or the like. The UES information is accessible through

the boundary scan programming port via a specific com-

mand. This information can be read even when the

security cell is programmed.

XCVR

OEA OEB

I/OA I/OB

OEA OEB

Security

The ispGDXVA Family includes a security feature that

prevents reading the device program once set. Even

when set, it does not inhibit reading the UES or device ID

code. It can be erased only via a device bulk erase.

Figure 7. Four-Port Memory Interface

4-to-1

16-Bit MUX

Bidirectional

Port #1

Memory

OE1

Port

Port #2

OE2

OEM

Port #3

OE3

SEL0

SEL1

Port #4

OE4

Note: All OE and SEL lines driven by external arbiter logic (not shown).

1...4 5 678 9 10...25

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