MX23C8000
8M-BIT [1M x 8] CMOS MASK ROM
FEATURES
• 1M x 8 organization
• Standby current : 15uA
• Package
• Single +5V power supply
• Fast access time : 100/120/150/200ns
• Totally static operation
• Completely TTL compatible
• Operating current : 25mA
- 32 pin plastic DIP
- 32 pin plastic SOP
- 32 pin plastic PLCC
- 32 pin plastic TSOP
GENERAL DESCRIPTION
The MX23C8000 is a 5V only, 8M-bit, Read Only
Memory. It is organized as 1M words by 8 bits, oper-
ates from a single +5V supply, has a static standby mode,
and has an access time of 100/120/150/200ns. It is
designed to be compatible with all microprocessors and
similar applications in which high performance, large bit
storage and simple interfacing are important design con-
siderations.
MX23C8000 offers automatic power-down, with power-
down controlled by the chip enable (CE) input. When
CE goes high, the device automatically powers down
and remains in a low-power standby modes as long as
CE remains high.
PIN CONFIGURATION
32 PDIP
32 SOP
A19
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
VCC
A18
A17
A14
A13
A8
VCC
A18
A17
A14
A13
A8
32
31
30
29
28
27
26
25
24
23
22
21
10
19
18
17
A19
A16
A15
A12
A7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
2
3
4
5
A6
6
A9
A9
A5
7
A11
OE
A10
CE
Q7
Q6
Q5
Q4
Q3
A11
OE
A10
CE
A4
8
A3
9
A2
10
11
12
13
14
15
16
A1
Q7
A0
Q6
Q0
Q1
Q2
VSS
Q5
Q4
Q3
32 PLCC
32TSOP
A11
A9
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
Q7
Q6
Q5
Q4
Q3
VSS
Q2
Q1
Q0
A0
2
4
1
32
30
A8
3
A14
A13
A8
5
A7
A6
A5
A4
A3
A2
A1
A0
DQ
29
A13
A14
A17
A18
VCC
A19
A16
A15
A12
A7
4
5
6
7
A9
8
MX23C8000
A11
OE
A10
CE
Q7
9
25
9
MX23C8000
10
11
12
13
14
15
16
A6
A1
13
21
A5
A2
14
17
20
A4
A3
P/N:PM0137
REV. 4.3, JUL. 03, 2003
1