MX23C8111
8M-BIT MASK ROM (8/16 BIT OUTPUT)
FEATURES
ORDER INFORMATION
• Bit organization
- 1M x 8 (byte mode)
- 512K x 16 (word mode)
• Fast access time
- Random access: 90ns (max.)
- Page access: 50ns (max.)
• Current
- Operating: 60mA
- Standby: 100uA
• Supply voltage
Part No.
Access Page Access Package
Time
Time
50ns
50ns
60ns
50ns
60ns
MX23C8111MC-90 90ns
MX23C8111MC-10 100ns
MX23C8111MC-12 120ns
MX23C8111PC-10 100ns
MX23C8111PC-12 120ns
44 pin SOP
44 pin SOP
44 pin SOP
42 pin PDIP
42 pin PDIP
- 5V±10%
• Package
- 44 pin SOP (500mil)
- 42 pin PDIP (600mil)
PIN DESCRIPTION
PIN CONFIGURATION
42 PDIP
44 SOP
Symbol
A0~A18
D0~D7
CE
Pin Function
Address Inputs
NC
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
NC
A8
A9
A18
A17
A7
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
1
NC
A8
2
2
A18
Data Outputs
3
4
A9
A17
A7
3
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A-1
D7
A6
4
Chip Enable Input
Output Enable Input
Power Supply Pin
Ground Pin
5
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A1
D7
D14
D6
D13
D5
D12
D4
VCC
A6
A5
5
6
OE
A5
A4
6
7
A4
A3
7
VCC
8
A3
A2
8
9
A2
A1
9
VSS
10
11
12
13
14
15
16
17
18
19
20
21
22
A1
A0
A0
10
11
12
13
14
15
16
17
18
19
20
21
NC
No Connection
CE
VSS
OE
D0
CE
VSS
OE
D0
D8
D1
D9
D2
D10
D3
D11
D14
D6
D8
D1
D13
D5
D9
D2
D12
D4
D10
D3
VCC
D11
MODE SELECTION
CE
H
L
OE
X
Byte
X
D15/A-1
X
D0~D7
D8~D15
Mode
-
Power
Stand-by
Active
Active
Active
High Z
High Z
D0~D7
D0~D7
High Z
High Z
D8~D15
High Z
H
L
X
X
-
L
H
Output
Input
Word
Byte
L
L
L
P/N:PM0171
REV. 2.6, JUL. 29, 2003
1