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1EDN7550UXTSA1

更新时间: 2024-11-06 02:50:59
品牌 Logo 应用领域
英飞凌 - INFINEON 驱动
页数 文件大小 规格书
27页 1145K
描述
Single-channel EiceDRIVER™ gate-drive IC with true differential inputs

1EDN7550UXTSA1 数据手册

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EiceDRIVER1EDN7550 and 1EDN8550  
Single-channel EiceDRIVER gate-drive IC with true differential inputs  
Features  
Very large common-mode input voltage range (CMR) up to ± 150 V (Table 1)  
Supply voltage (VDD) up to 20 V  
2 UVLO options: 4 V and 8 V  
Separate low impedance source and sink outputs  
-
-
4 A / 0.85 Ω source  
8 A / 0.35 Ω sink  
45 ns propagation delay with -7 / +10 ns accuracy  
SOT23 or TSNP 6-pin package  
Fully qualified for industrial applications according to JEDEC  
Description  
EiceDRIVER1EDNx550 is a new family of single-channel non-isolated gate-driver ICs. Due to the unique fully  
differential input circuitry with excellent common-mode rejection, the logic driver state is exclusively controlled  
by the voltage difference between the two inputs, completely independent of the driver’s reference (ground)  
potential. This eliminates the risk for false triggering and thus is a significant benefit in all applications  
exhibiting voltage differences between driver and controller ground, a problem typical for systems with  
4-pin packages (Kelvin Source connection)  
high parasitic PCB inductances (long distances, single-layer PCB)  
bipolar gate drive  
In addition, within the common-mode voltage range CMR for PWM signal at 3.3 V as in (Table 1), 1EDNx550  
allows to address even high-side and half-bridge applications. For PWM signals other than 3.3. V please see the  
Application note Applications of 1EDNx550 single-channel lowside EiceDRIVERwith truly differential inputs.  
Table 1  
Part number  
Product portfolio  
CMR static  
+ 72 V / - 84 V  
+ 72 V / - 84 V  
+ 72 V / - 84 V  
CMR dynamic  
± 150 V  
UVLO  
4 V  
Package  
PG-SOT23-6  
PG-SOT23-6  
PG-TSNP-6  
1EDN7550B  
1EDN8550B  
1EDN7550U  
± 150 V  
8 V  
± 150 V  
4 V  
1EDNx550  
ZVDD  
VDD  
Rgoff  
Rin1  
IN-  
GND OUT_SRC  
VDD  
OUT_SNK  
DVRin  
SGND  
Rgon  
IN+  
Rin2  
CVDD  
Figure 1  
Typical application  
Datasheet  
www.infineon.com  
Please read the Important Notice and Warnings at the end of this document  
Rev. 2.2  
2019-12-09  

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