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1522MLFT PDF预览

1522MLFT

更新时间: 2024-11-11 19:24:15
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
14页 452K
描述
Video Clock Generator, 230MHz, CMOS, PDSO24, LEAD FREE, SOIC-24

1522MLFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:LEAD FREE, SOIC-24针数:24
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.71
其他特性:DIFFERENTIAL O/PS; PHASE COMPARATOR GAIN O/PSJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:15.24 mm
湿度敏感等级:1端子数量:24
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:230 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
主时钟/晶体标称频率:20 MHz认证状态:Not Qualified
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.493 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, VIDEOBase Number Matches:1

1522MLFT 数据手册

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DATA SHEET  
ICS1522  
User-Programmable Video Clock Generator/ Line-  
Locked Clock Regenerator  
General Description  
Features  
Serial programming: Feedback and reference divisors,  
The ICS1522 is a very high performance monolithic phase-  
locked loop (PLL) frequency synthesizer. Utilizing ICS’s  
advanced CMOS mixed-mode technology, the ICS1522  
provides a low-cost solution for high-end video clock  
generation where synchronization to an external video  
source is required.  
VCO gain, phase comparator gain, relative phase and  
test modes.  
Supports high-resolution graphics - Differential CLK  
out-puts to 230 MHz  
Eliminates need for multiple ECL output voltage control-  
led crystal oscillators and external components  
The ICS1522 has differential video clock outputs (CLK+  
and CLK-) that are compatible with industry standard  
video DAC.  
Fully-programmable synthesizer capability - not just a  
clock multiplier  
Line-locked clock generation capability;  
15 - 100 kHz  
Operating frequencies are fully programmable with direct  
control provided for reference divider, feedback divider  
and postscaler.  
External feedback loop capability allows graphics  
system to be used as the feedback divisor with  
synchronous switchover to internal feedback  
Small footprint 24-pin SOIC  
Coarse and fine phase adjustment permits precise  
clocking in video recovery application  
Applications  
LCD Projector Systems  
Multimedia video line locking  
Genlock applications  
Block Diagram  
IDT™ / ICS™ User-Programmable Video Clock Generator/ Line-Locked Clock Regenerator  
ICS1522  
1

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