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10M50DCF484C8G PDF预览

10M50DCF484C8G

更新时间: 2023-04-15 00:00:00
品牌 Logo 应用领域
英特尔 - INTEL
页数 文件大小 规格书
68页 976K
描述
Field Programmable Gate Array, 50000-Cell, CMOS, PBGA484, 23 X 23 MM, 1 MM PITCH, ROHS COMPLIANT, FBGA-484

10M50DCF484C8G 数据手册

 浏览型号10M50DCF484C8G的Datasheet PDF文件第62页浏览型号10M50DCF484C8G的Datasheet PDF文件第63页浏览型号10M50DCF484C8G的Datasheet PDF文件第64页浏览型号10M50DCF484C8G的Datasheet PDF文件第66页浏览型号10M50DCF484C8G的Datasheet PDF文件第67页浏览型号10M50DCF484C8G的Datasheet PDF文件第68页 
M10-DATASHEET  
2015.05.04  
65  
Document Revision History for MAX 10 FPGA Device Datasheet  
Changes  
Date  
Version  
Updated fHSCLK and HSIODR specifications for –A7 speed grade in the following tables:  
True PPDS and Emulated PPDS_E_3R Transmitter Timing Specifications for MAX 10 Dual Supply  
Devices  
True RSDS and Emulated RSDS_E_3R Transmitter Timing Specifications for MAX 10 Dual Supply  
Devices  
True Mini-LVDS and Emulated Mini-LVDS_E_3R Transmitter Timing Specifications for MAX 10 Dual  
Supply Devices  
True LVDS Transmitter Timing Specifications for MAX 10 Single Supply Devices  
True LVDS Transmitter Timing Specifications for MAX 10 Dual Supply Devices  
Emulated LVDS_E_3R Transmitter Timing Specifications for MAX 10 Single Supply Devices  
Emulated LVDS_E_3R, SLVS, and Sub-LVDS Transmitter Timing Specifications for MAX 10 Dual  
Supply Devices  
LVDS Receiver Timing Specifications for MAX 10 Single Supply Devices  
LVDS, TMDS, HiSpi, SLVS, and Sub-LVDS Receiver Timing Specifications for MAX 10 Dual Supply  
Devices  
Updated TCCS specifications in the following tables:  
True PPDS and Emulated PPDS_E_3R Transmitter Timing Specifications for MAX 10 Dual Supply  
Devices  
True RSDS and Emulated RSDS_E_3R Transmitter Timing Specifications for MAX 10 Dual Supply  
Devices  
Emulated RSDS_E_1R Transmitter Timing Specifications for MAX 10 Dual Supply Devices  
True Mini-LVDS and Emulated Mini-LVDS_E_3R Transmitter Timing Specifications for MAX 10 Dual  
Supply Devices  
True LVDS Transmitter Timing Specifications for MAX 10 Single Supply Devices  
True LVDS Transmitter Timing Specifications for MAX 10 Dual Supply Devices  
Emulated LVDS_E_3R Transmitter Timing Specifications for MAX 10 Single Supply Devices  
Emulated LVDS_E_3R, SLVS, and Sub-LVDS Transmitter Timing Specifications for MAX 10 Dual  
Supply Devices  
MAX 10 FPGA Device Datasheet  
Send Feedback  
Altera Corporation  

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