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10M08SAU169I7G

更新时间: 2024-11-09 20:43:07
品牌 Logo 应用领域
英特尔 - INTEL 时钟可编程逻辑
页数 文件大小 规格书
14页 604K
描述
Field Programmable Gate Array, PBGA169, 11 X 11 MM, 0.80 MM PITCH, ROHS COMPLIANT, UBGA-169

10M08SAU169I7G 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:LFBGA, BGA169,13X13,32Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:0.93
Samacsys Description:IC FPGA 130 I/O 169UBGA其他特性:OPERATES AT 3.3V NOMINAL VCC
最大时钟频率:416 MHzJESD-30 代码:S-PBGA-B169
长度:11 mm湿度敏感等级:3
可配置逻辑块数量:500输入次数:130
逻辑单元数量:8000输出次数:130
端子数量:169最高工作温度:100 °C
最低工作温度:-40 °C组织:500 CLBS
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA169,13X13,32封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY座面最大高度:1.55 mm
最大供电电压:3.15 V最小供电电压:2.85 V
标称供电电压:3 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11 mm
Base Number Matches:1

10M08SAU169I7G 数据手册

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MAX 10 FPGA Device Overview  
2014.09.22  
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M10-OVERVIEW  
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MAX® 10 devices are the industry’s first single chip, non-volatile programmable logic devices (PLDs) to  
integrate the optimal set of system components.  
The following lists the highlights of the MAX 10 devices:  
Internally stored dual images with self-configuration  
Comprehensive design protection features  
Integrated ADCs  
Hardware to implement the Nios II 32-bit microcontroller IP  
MAX 10 devices are the ideal solution for system management, I/O expansion, communication control  
planes, industrial, automotive, and consumer applications.  
Related Information  
MAX 10 FPGA Device Datasheet  
Key Advantages of MAX 10 Devices  
Table 1: Key Advantages of the MAX 10 Device Family  
Advantage  
Simple and fast configuration  
Flexibility and integration  
Supporting Feature  
Secure on-die configuration in less than 10 ms  
Single device integrating PLD logic, RAM, flash memory,  
digital signal processing (DSP), ADC, phase-locked loop  
(PLL), and I/Os  
Small packages available from 3 mm x 3 mm  
Low power  
Sleep mode — significant standby power reduction and  
resume in less than 1 ms  
Longer battery life — resume from full power-off in less  
than 10 ms  
20 years estimated life cycle  
Built on TSMC's 55 nm process technology  
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trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance  
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any  
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,  
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device  
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