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1024SA-45TE13 PDF预览

1024SA-45TE13

更新时间: 2024-11-12 18:03:39
品牌 Logo 应用领域
CATALYST 光电二极管
页数 文件大小 规格书
17页 105K
描述
Power Supply Support Circuit, Fixed, 1 Channel, CMOS, PDSO8, SOIC-8

1024SA-45TE13 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.68
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:R-PDSO-G8长度:4.9 mm
信道数量:1功能数量:1
端子数量:8最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
座面最大高度:1.75 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:3.9 mmBase Number Matches:1

1024SA-45TE13 数据手册

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Preliminary Information  
CAT1024, CAT1025  
Supervisory Circuits with I2C Serial 2K CMOS EEPROM and Manual Reset  
FEATURES  
Built-in inadvertent write protection  
— WP pin (CAT1025)  
Precision power supply voltage monitor  
— 5V, 3.3V and 3V systems  
— Five threshold voltage options  
Active high or low reset  
1,000,000 Program/Erase cycles  
Manual reset input  
100 year data retention  
— Valid reset guaranteed at VCC=1V  
400kHz I2C bus  
8-pin DIP, SOIC, TSSOP, TDFN (MSOP  
(3x4.9mm) & 3x3mm foot prints) or MSOP  
packages  
2.7V to 5.5V operation  
Low power CMOS technology  
16-Byte page write buffer  
Automotive, extended automotive and  
industrial temperature ranges  
DESCRIPTION  
voltages support 5V, 3.3V and 3V systems. If power supply  
voltages are out of tolerance reset signals become active,  
preventing the system microcontroller, ASIC or peripherals  
from operating. Reset signals become inactive typically 200  
ms after the supply voltage exceeds the reset threshold  
level. With both active high and low reset signals, interface  
to microcontrollers and other ICs is simple. In addition, the  
RESET pin or a separate input, MR, can be used as an input  
for push-button manual reset capability.  
The CAT1024 and CAT1025 are complete memory and  
supervisorysolutionsformicrocontroller-basedsystems.  
A 2kbit serial EEPROM memory and a system power  
supervisor with brown-out protection are integrated  
together in low power CMOS technology. Memory  
interface is via a 400kHz I2C bus.  
The CAT1025 provides a precision VCC sense circuit  
and two open drain outputs: one (RESET) drives high  
and the other (RESET) drives low whenever VCC falls  
below the reset threshold voltage. The CAT1025 also  
has a Write Protect input (WP). Write operations are  
disabled if WP is connected to a logic high.  
The CAT1024/25 memory features a 16-byte page. In  
addition, hardware data protection is provided by a VCC  
sense circuit that prevents writes to memory whenever VCC  
falls below the reset threshold or until VCC reaches the reset  
threshold during power up.  
The CAT1024 also provides a precision VCC sense  
circuit, but has only a RESET output and does not have  
a Write Protect input.  
Available packages include an 8-pin DIP and a surface  
mount8-pinSO,8-pinTSSOP,8-pinTDFNand8-pinMSOP  
packages.TheTDFNpackagethicknessis0.8mmmaximum.  
TDFN footprint options are 3x3mm or 3x4.9mm (MSOP pad  
layout).  
The power supply monitor and reset circuit protect  
memory and system controllers during power up/down  
and against brownout conditions. Five reset threshold  
(Bottom View)  
TDFN Package: 3mm x 3mm  
0.8mm maximum height - (RD4)  
(Bottom View)  
TDFN Package: 3mm x 4.9mm  
0.8mm maximum height - (RD2)  
PIN CONFIGURATION  
V
MR  
1
2
3
4
8
7
6
5
8
7
6
5
1
2
3
4
V
MR  
CC  
NC  
MR  
RESET  
NC  
V
1
2
3
4
8
7
6
5
CC  
NC  
CC  
RESET  
NC  
NC  
RESET  
NC  
CAT1024  
CAT1024  
CAT1024  
SCL  
SDA  
SCL  
SDA  
SCL  
SDA  
V
SS  
V
SS  
V
SS  
V
MR  
8
7
6
5
V
MR  
1
1
1
2
3
4
8
8
7
6
5
MR  
V
CC  
CC  
CC  
RESET  
RESET  
WP  
SCL  
SDA  
2
3
4
RESET  
RESET  
WP  
SCL  
SDA  
7
6
5
RESET 2  
WP  
CAT1025  
CAT1025  
CAT1025  
3
4
SCL  
SDA  
RESET  
V
V
SS  
V
SS  
SS  
© 2003 by Catalyst Semiconductor, Inc.  
Doc No. 3008, Rev. G  
Characteristics subject to change without notice  

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