Internally Trimmed
a
Integrated Circuit Multiplier
AD532
FEATURES
PIN CONFIGURATIONS
Pretrimmed to ؎1.0% (AD532K)
Y
2
No External Components Required
Guaranteed ؎1.0% max 4-Quadrant Error (AD532K)
Diff Inputs for (X1 – X2) (Y1 – Y2)/10 V Transfer Function
Monolithic Construction, Low Cost
1
2
3
4
5
6
7
14 +V
S
Z
V
OS
Y
1
13
12
11
10
9
OUT
Y
1
2
+V
S
GND
–V
Y
S
AD532
TOP VIEW
(Not to Scale)
AD532
TOP VIEW
(Not to Scale)
NC
NC
NC
V
OS
APPLICATIONS
Multiplication, Division, Squaring, Square Rooting
Algebraic Computation
Power Measurements
Instrumentation Applications
Available in Chip Form
Z
X
2
GND
X
2
X
8
X
1
NC
OUT
1
–V
S
NC = NO CONNECT
2
3
1
20 19
18
Y
4
5
6
–V
2
S
17
16
NC
V
NC
NC
AD532
TOP VIEW
OS
15 NC
14
NC 7
(Not to Scale)
PRODUCT DESCRIPTION
8
GND
NC
The AD532 is the first pretrimmed single chip monolithic multi-
plier/divider. It guarantees a maximum multiplying error of
±1.0% and a ±10 V output voltage without the need for any
external trimming resistors or output op amp. Because the
AD532 is internally trimmed, its simplicity of use provides
design engineers with an attractive alternative to modular multi-
pliers, and its monolithic construction provides significant ad-
vantages in size, reliability and economy. Further, the AD532
can be used as a direct replacement for other IC multipliers that
require external trim networks (such as the AD530).
9
10 11 12 13
NC = NO CONNECT
GUARANTEED PERFORMANCE OVER TEMPERATURE
The AD532J and AD532K are specified for maximum multi-
plying errors of ±2% and ±1% of full scale, respectively at
+25°C, and are rated for operation from 0°C to +70°C. The
AD532S has a maximum multiplying error of ±1% of full scale
at +25°C; it is also 100% tested to guarantee a maximum error
of ±4% at the extended operating temperature limits of –55°C
and +125°C. All devices are available in either the hermetically-
sealed TO-100 metal can, TO-116 ceramic DIP or LCC packages.
J, K and S grade chips are also available.
FLEXIBILITY OF OPERATION
The AD532 multiplies in four quadrants with a transfer func-
tion of (X1 – X2)(Y1 – Y2)/10 V, divides in two quadrants with
a 10 V Z/(X1 – X2) transfer function, and square roots in one
quadrant with a transfer function of ±√10 V Z. In addition to
these basic functions, the differential X and Y inputs provide
significant operating flexibility both for algebraic computation and
transducer instrumentation applications. Transfer functions,
such as XY/10 V, (X2 – Y2)/10 V, ±X2/10 V and 10 V Z/(X1 – X2),
are easily attained and are extremely useful in many modulation
and function generation applications, as well as in trigonometric
calculations for airborne navigation and guidance applications,
where the monolithic construction and small size of the AD532
offer considerable system advantages. In addition, the high
CMRR (75 dB) of the differential inputs makes the AD532
especially well qualified for instrumentation applications, as it
can provide an output signal that is the product of two transducer-
generated input signals.
ADVANTAGES OF ON-THE-CHIP TRIMMING OF THE
MONOLITHIC AD532
1. True ratiometric trim for improved power supply rejection.
2. Reduced power requirements since no networks across sup-
plies are required.
3. More reliable since standard monolithic assembly techniques
can be used rather than more complex hybrid approaches.
4. High impedance X and Y inputs with negligible circuit
loading.
5. Differential X and Y inputs for noise rejection and additional
computational flexibility.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 1999
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