ZXLD1101
ELECTRICAL CHARACTERISTICS (at VIN = 3V, Tam b = 25°C unless otherwise stated(1)
)
S YMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
V
In p u t vo lta g e
S u p p ly cu rre n t
Qu ie s ce n t
2.5
5.5
V
IN
I
IN
V
= V , I = 0,
60
100
A
EN
IN LX
Ou tp u t n o t s w itch in g
V = 0V
EN
S h u td o w n
500
109.5
100
1
nA
m V
nA
V
FB p in co n tro l vo lta g e
FB p in in p u t cu rre n t
Op e ra tin g fre q u e n cy
90.5
350
FB
I
FB
LX
f
L=10H, V
=10V,
=10V,
0.35
500
MHz
OUT
I
=20m A
OUT
T
T
LX o u tp u t 'OFF' tim e
ns
µs
OFF
ON
(2)
LX o u tp u t 'ON' tim e
5
I
S w itch p e a k cu rre n t lim it
L=10H, V
=20m A
320
1.5
m A
LXp k
OUT
I
OUT
R
S w itch 'On ' re s is ta n ce
⍀
µA
V
LX
I
S w itch le a ka g e cu rre n t
V
=20V
1
LX(le a k)
LX
V
V
V
Co n tro lle r o u tp u t vo lta g e
EN p in Hig h le ve l In p u t vo lta g e
EN p in Lo w le ve l In p u t vo lta g e
EN p in Lo w le ve l in p u t cu rre n t
EN p in Hig h le ve l in p u t cu rre n t
No rm a l o p e ra tio n
De vice a ctive
28
OUT
ENH
ENL
ENL
ENH
1.5
V
V
IN
De vice in s h u td o w n
0.4
-100
1
V
I
I
V
V
V
=0V
nA
A
µs
EN
EN
EN
=V
IN
(3)
T
EN p in tu rn o ff d e la y
s w itch e d fro m h ig h
120
EN(h o ld )
to lo w
PWM d u ty cycle ra n g e a t ‘EN’ in p u t fo r
filte re d PWM co n tro l
10kHz < f < 100kHz,
20
100
100
%
∆T/T
(4)
V
=V
ENH IN
f
In te rn a l PWM lo w p a s s filte r cu t-o ff
fre q u e n cy
4
kHz
LPF
A
Filte r a tte n u a tio n
f=30kHz
f < 1kHz, V
52.5
dB
%
LPF
PWM d u ty cycle ra n g e a t ‘EN’ in p u t fo r
=V
0
∆T/T
ENH
IN
(5)
‘g a te d ’ o u tp u t cu rre n t co n tro l
NOTES:
(1) Production testing of the device is perform ed at 25°C. Functional operation of the device over a -40°C to +85°C tem perature range is
guaranteed by design, characterisation and process control.
(2) Nom inal 'on' tim e (T
) is defined by the input voltage (V ), coil inductance (L) and peak current (I
) according to the expression:
ONnom
IN
LXpkdc
T
= {I
) x L/V } +200ns.
ONnom
LX(pkdc IN
(3) This is the tim e for which the device rem ains active after the EN pin has been asserted low. This delay is necessary to allow the output to be
m aintained during dc PWM m ode operation.
(4) The m inim um PWM signal frequency during this m ode of operation is to ensure that the device rem ains active during PWM control. This
provides a continuous dc output current. For lower frequencies, the device will be gated 'on' and 'off' during PWM control.
(5) The m axim um PWM signal frequency during this m ode of operation should be kept as low as possible to m inim ise errors due to the turn-off
delay of the device (see Enable pin turn-off delay).
ISSUE 4 - J ULY 2004
S E M IC O N D U C T O R S
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