5秒后页面跳转
ZL10036LDE1 PDF预览

ZL10036LDE1

更新时间: 2024-02-17 17:23:48
品牌 Logo 应用领域
美高森美 - MICROSEMI 商用集成电路
页数 文件大小 规格书
38页 665K
描述
SPECIALTY CONSUMER CIRCUIT, QCC40, 6 X 6 MM, QFN-40

ZL10036LDE1 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:HVQCCN,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.82
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:S-XQCC-N40
JESD-609代码:e3长度:6 mm
功能数量:1端子数量:40
最高工作温度:85 °C最低工作温度:-10 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:0.9 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V表面贴装:YES
温度等级:OTHER端子面层:MATTE TIN
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:6 mm

ZL10036LDE1 数据手册

 浏览型号ZL10036LDE1的Datasheet PDF文件第2页浏览型号ZL10036LDE1的Datasheet PDF文件第3页浏览型号ZL10036LDE1的Datasheet PDF文件第4页浏览型号ZL10036LDE1的Datasheet PDF文件第5页浏览型号ZL10036LDE1的Datasheet PDF文件第6页浏览型号ZL10036LDE1的Datasheet PDF文件第7页 
ZL10036  
Digital Satellite Tuner with RF Bypass  
Data Sheet  
May 2004  
Features  
QPSK tuner for quadrature down conversion from  
L-band to Zero IF  
Ordering Information  
ZL10036LDG 40-pin QFN  
ZL10036LDE 40-pin QFN  
(trays)  
(tubes)  
(tape and reel)  
Compatible with DSS and DVB formats (QPSK)  
Symbol rate range 1 to 45 MSps  
ZL10036LDF  
40-pin QFN  
Power & forget, fully integrated, alignment free,  
local oscillator  
-10°C to +85°C  
Integrated baseband filters with bandwidth adjust  
from 4 to 40 MHz  
Description  
The ZL10036 is a single chip wideband direct  
conversion tuner, with integral RF bypass, optimized  
for application in digital satellite receiver systems.  
Good immunity to strong adjacent undesired  
channels  
Selectable RF bypass  
The device offers a highly integrated solution to a  
satellite tuner function, incorporating an I²C bus  
interface controller, a low phase noise PLL frequency  
synthesizer, a quadrature phase split tuner, a fully  
integrated local oscillator which requires no production  
set up, and adjustable baseband channel filters.  
I²C bus interface with 3V3 compatible logic levels  
Integrated RF loop through for cascaded tuner  
applications  
Power saving mode/hardware power down  
Optimized front end solution when partnered with  
Zarlink ZL10312 demodulator  
The I²C bus interface controls all of the tuner  
functionality including the PLL frequency synthesizer,  
the bypass disable and the baseband gain and  
bandwidth adjust.  
Applications  
Satellite receiver systems  
Figure 1 - Basic Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2004, Zarlink Semiconductor Inc. All Rights Reserved.  

与ZL10036LDE1相关器件

型号 品牌 获取价格 描述 数据表
ZL10036LDF ZARLINK

获取价格

Digital Satellite Tuner with RF Bypass
ZL10036LDF1 ZARLINK

获取价格

Digital Satellite Tuner with RF Bypass
ZL10036LDG ZARLINK

获取价格

Digital Satellite Tuner with RF Bypass
ZL10036LDG1 ZARLINK

获取价格

Digital Satellite Tuner with RF Bypass
ZL10037 ZARLINK

获取价格

Digital Satellite Tuner with RF Bypass
ZL10037LCF ZARLINK

获取价格

Digital Satellite Tuner with RF Bypass
ZL10037LCF1 ZARLINK

获取价格

Digital Satellite Tuner with RF Bypass
ZL10037LCG ZARLINK

获取价格

Digital Satellite Tuner with RF Bypass
ZL10037LCG1 ZARLINK

获取价格

Digital Satellite Tuner with RF Bypass
ZL10038/LDF MICROSEMI

获取价格

Consumer Circuit, BICMOS, 6 X 6 MM, QFN-40