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Z80182 PDF预览

Z80182

更新时间: 2022-12-08 22:56:52
品牌 Logo 应用领域
ZILOG 控制器
页数 文件大小 规格书
109页 734K
描述
ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP⑩)

Z80182 数据手册

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Z80182/Z8L182  
ZILOG INTELLIGENT PERIPHERAL  
Zilog  
P R E L I M I N A R Y  
EMULATION SIGNALS  
EV1, EV2. Emulation Select (input). These two pins  
determine the emulation mode of the Z180 MPU (Table 1).  
Table 1. Evaluation Modes  
EV1 Description  
Normal mode, on-chip Z180 bus master  
Mode  
EV2  
0
1
2
3
0
0
1
1
0
1
0
1
Emulation Adapter Mode  
Emulator Probe Mode  
Reserved for Test  
SYSTEM CONTROL SIGNALS  
ST.Status(output,activeHigh).Thissignalisusedwiththe  
/M1 and /HALT output to decode the status of the CPU  
machine cycle. If unused, this pin should be pulled to VDD.  
/RAMCS. RAM Chip Select (output, active Low). Signal  
used to access RAM based upon the Address and the  
RAMLBR and RAMUBR registers and /MREQ.  
/RESET. Reset Signal (input, active Low). /RESET signal is  
used for initializing the MPU and other devices in the  
system. It must be kept in the active state for a period of at  
least three system clock cycles.  
/ROMCS. ROM Chip Select (output, active Low). Signal  
used to access ROM based upon the address and the  
ROMBR register and /MREQ.  
E. Enable Clock (output, active High). Synchronous  
IEI.Interrupt Enable Signal (input, active High). IEI is used  
with the IEO to form a priority daisy chain when there is  
more than one interrupt-driven peripheral.  
machine cycle clock output during bus transactions.  
XTAL. Crystal (input, active High). Crystal oscillator  
connection.Thispinshouldbeleftopenifanexternalclock  
is used instead of a crystal. The oscillator input is not a TTL  
level (reference DC characteristics).  
IEO. Interrupt Enable Output Signal (output, active High).  
Inthedaisy-chaininterruptcontrol,IEOcontrolstheinterrupt  
of external peripherals. IEO is active when IEI is 1 and the  
CPU is not servicing an interrupt from the on-chip  
peripherals. This pin is multiplexed with /IOCS on the  
/IOCS/IEO pin. The /IOCS function is the default on Power  
On or Reset conditions and is changed by programming  
bit 2 in the Interrupt Edge/Pin MUX Register.  
EXTAL.ExternalClock/Crystal(input,activeHigh).Crystal  
oscillator connections to an external clock can be input to  
theZ80180onthispinwhenacrystalisnotused. Thisinput  
is Schmitt triggered.  
PHI. System Clock (output, active High). The output is  
used as a reference clock for the MPU and the external  
system. The frequency of this output is reflective of the  
functional speed of the processor. In clock divide-by-two  
mode, the pHI frequency is half that of the crystal or input  
clock.Ifdivide-by-onemodeisenabled,thePHIfrequency  
is equivalent to that of crystal or input frequency. The PHI  
frequency is also fed to the ESCC core. If running over 20  
MHz (5V) or 10 MHz (3V) the PHI-ESCC frequency divider  
should be enabled to divide the PHI clock by two prior to  
feeding into the ESCC core.  
/IOCS. Auxiliary Chip Select Output Signal (output, active  
Low). This pin is multiplexed with /IEO on the /IOCS/IEO  
pin. /IOCS is an auxiliary chip select that decodes A7, A6,  
/IORQ, /M1 and effectively decodes the address space  
xx80H to xxBFH for I/O transactions. A15 through A8 are  
not decoded so that the chip select is active in all pages of  
I/Oaddressspace. The/IOCSfunctionisthedefaultonthe  
/IOCS/IEO pin after Power On or Reset conditions and is  
changed by programming bit 2 in the Interrupt Edge/Pin  
MUX Register.  
DS971820600  
3-10  

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