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Z510

更新时间: 2022-09-10 14:56:34
品牌 Logo 应用领域
英特尔 - INTEL /
页数 文件大小 规格书
73页 779K
描述
Intel Atom Processor

Z510 数据手册

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Introduction  
1 Introduction  
The Intel® Atom™ processor Z5xx series is built on a new 45-nanometer Hi-k low  
power micro-architecture and 45 nm process technology—the first generation of low-  
power IA-32 micro-architecture specially designed for the new class of Mobile Internet  
Devices (MIDs). The Intel Atom processor Z5xx series supports the Intel® System  
Controller Hub (Intel® SCH), a single-chip component designed for low-power  
operation.  
1.1  
1.2  
Abstract  
This document contains electrical, mechanical, and thermal specifications for Intel  
Atom processors Z560, Z550, Z540, Z530, Z520, Z515, Z510, and Z500.  
Note: In this document, Intel Atom processor Z5xx series refers to the Intel Atom  
processors Z560, Z550, Z540, Z530, Z520, Z515, Z510, and Z500.  
Note: In this document, the Intel Atom processor Z5xx series is referred to as “processor”.  
The Intel® System Controller Hub (Intel® SCH) is referred to as the “Intel® SCH”.  
Major Features  
The following list provides some of the key features on this processor:  
New single-core processor for mobile devices offering enhanced performance  
On die, primary 32-kB instructions cache and 24-kB write-back data cache  
100-MHz and 133-MHz Source-Synchronous front side bus (FSB)  
100 MHz: Intel Atom processor Z515, Z510, and Z500  
133 MHz: Intel Atom processor Z560, Z550, Z540, Z530, and Z520.  
Supports Hyper-Threading Technology 2-threads  
On die 512-kB, 8-way L2 cache  
Support for IA 32-bit architecture  
Intel® Virtualization Technology (Intel® VT)  
Intel® Streaming SIMD Extensions 2 and 3 (Intel® SSE2 and Intel® SSE3) and  
Supplemental Streaming SIMD Extensions 3 (SSSE3) support  
Supports new CMOS FSB signaling for reduced power  
Micro-FCBGA8 packaging technologies  
Thermal management support using TM1 and TM2  
On die Digital Thermal Sensor (DTS) for thermal management support using  
Thermal Monitor (TM1 and TM2)  
FSB Lane Reversal for flexible routing  
Supports C0/C1(e)/C2(e)/C4(e) power states  
Intel Deep Power Down Technology (C6)  
L2 Dynamic Cache Sizing  
Advanced power management features including Enhanced Intel SpeedStep®  
Technology  
Datasheet  
7
 
 
 

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