Datasheet > XR16V798IQ-F

XR16V798IQ-F

更新时间： 2024-11-23 19:54:35

品牌	Logo	应用领域
艾科嘉 - EXAR		外围集成电路
页数	文件大小	规格书
56页	403K
描述
Serial I/O Controller, PQFP100

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XR16V798IQ-F 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
包装说明：	QFP, QFP100,.7X.9	Reach Compliance Code：	compliant
风险等级：	3.89	JESD-30 代码：	R-PQFP-G100
JESD-609代码：	e3	湿度敏感等级：	4
端子数量：	100	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	QFP	封装等效代码：	QFP100,.7X.9
封装形状：	RECTANGULAR	封装形式：	FLATPACK
电源：	2.5/3.3 V	认证状态：	Not Qualified
子类别：	Serial IO/Communication Controllers	表面贴装：	YES
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	QUAD	uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches：	1

XR16V798IQ-F 数据手册

XR16V798

HIGH PERFORMANCE 2.25V TO 3.6V OCTAL UART WITH FRACTIONAL

JULY 2008

REV. 1.0.1

FEATURES

GENERAL DESCRIPTION

• 2.25V to 3.6V with 5V Tolerant Serial Inputs

• Single Interrupt output for all 8 UARTs

• A Global Interrupt Source Register for all 8 UARTs

• 5G “Flat” UART Registers for easier programming

• Simultaneous Initialization of all UART channels

The XR16V798 (798), is a 2.25V to 3.6V octal

Universal Asynchronous Receiver and Transmitter

(UART) with 5V tolerant serial (modem) inputs. The

highly integrated device is designed for high

bandwidth requirement in communication systems.

The global interrupt source register provides a

complete interrupt status indication for all 8 channels

to speed up interrupt parsing. Each UART has its own

16C550 compatible set of configuration registers, TX

and RX FIFOs of 64 bytes, fully programmable

transmit and receive FIFO trigger levels, TX and RX

FIFO level counters, automatic RTS/CTS or DTR/

DSR hardware flow control with programmable

hysteresis, autoamtic software (Xon/Xoff) flow

control, RS-485 half-duplex direction control with

programmable turn-around delay, Intel or Motorola

bus interface and sleep mode with a wake-up

indicator.

• A General Purpose Command-driven 16-bit

Timer/counter

• Sleep Mode with Wake-up Indication

• Highly Integrated Device for Space Saving

• Each UART is independently controlled with:

■ 16C550 Compatible 5G Register Set

■ 64-byte Transmit and Receive FIFOs

■ Fractional Baud Rate Generator

■ Transmit and Receive FIFO Level Counters

■ Programmable TX and RX FIFO Trigger Level

■ Automatic RTS/CTS or DTR/DSR Flow Control

■ Automatic Xon/Xoff Software Flow Control

NOTE: Covered by US patents #5,649,122 and #5,949,787

APPLICATIONS

■ RS485 HDX Control Output with Selectable

• Remote Access Servers

Turn-around Delay

• Ethernet Network to Serial Ports

• Network Management

• Factory Automation and Process Control

• Point-of-Sale Systems

■ Infrared (IrDA 1.0) Data Encoder/Decoder

■ Programmable Data Rate with Prescaler

• Up to 8 Mbps Serial Data Rate

• Pin compatible to XR16L788. Same 100-pin QFP

Package (14x20x3 mm)

• Multi-port RS-232/RS-422/RS-485 Cards

FIGURE 1. BLOCK DIAGRAM

UART Channel 0

64 Byte TX FIFO

TX0, RX0, DTR0#,

UART

Regs

DSR0#, RTS0#,

CTS0#, CD0#, RI0#

TX & RX

ENDEC

BRG

64 Byte RX FIFO

RST#

A7:A0

D7:D0

UART Channel 1

UART Channel 2

UART Channel 3

UART Channel 4

UART Channel 5

Data Bus

Device

IOR#

IOW#

CS#

Interface

Configuration

Registers

INT#

16/68#

UART Channel 6

TX7, RX7, DTR7#,

DSR7#, RTS7#,

UART Channel 7

16-bit

Timer/Counter

CTS7#, CD7#, RI7#

XTAL1

XTAL2

TMRCK

Crystal Osc/Buffer

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com

12 3 4 5 6 7...56

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