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XLL736781.250000X

更新时间： 2024-11-25 16:54:11
品牌 Logo 应用领域
艾迪悌 - IDT 机械输出元件振荡器
页数 文件大小 规格书
27页 613K
描述
LVDS Output Clock Oscillator

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XLL736781.250000X 技术参数

生命周期：ActiveReach Compliance Code：compliant
风险等级：5.71其他特性：ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT
最长下降时间：0.4 ns频率调整-机械：NO
频率稳定性：25%安装特点：SURFACE MOUNT
标称工作频率：781.25 MHz最高工作温度：70 °C
最低工作温度：-20 °C振荡器类型：LVDS
输出负载：100 OHM物理尺寸：7.0mm x 5.0mm x 1.3mm
最长上升时间：0.4 ns最大供电电压：3.465 V
最小供电电压：3.135 V标称供电电压：3.3 V
表面贴装：YES最大对称度：55/45 %
Base Number Matches：1

XLL736781.250000X 数据手册

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XL Family of Low Phase Noise  
Quartz-based PLL Oscillators  
XL  
Datasheet  
Description  
Features  
▪ Output types: LVDS, LVPECL, LVCMOS  
The IDT XL devices (XO and VCXO options) are ultra-precision  
crystal oscillators with 750 to 890fs typical phase jitter over 12kHz  
to 20MHz bandwidth. Available in a wide frequency range from  
0.750MHz to 1350MHz, the XL series crystal oscillators utilize a  
family of proprietary ASICs, with a key focus on noise reduction  
technologies.  
▪ Phase jitter (12kHz to 20MHz): 750fs to 890fs typical  
▪ Supply voltage: 2.5V or 3.3V  
▪ Package options:  
• 3.2 × 2.5 × 1.0 mm (not available for VCXO)  
• 5.0 × 3.2 × 1.2 mm  
• 7.0 × 5.0 × 1.3 mm  
The 3rd order Delta Sigma Modulator reduces noise to the levels  
that are comparable to traditional Bulk Quartz and SAW  
oscillators. With short lead-time, low cost, low noise, wide  
frequency range, excellent ambient performance, the XL devices  
are an excellent choice over the conventional technologies. The  
XL (XO option) devices have stabilities as tight as ±20ppm and  
the XL (VCXO option) devices have ±50ppm APR. Either option  
provides extremely quick delivery for both standard and custom  
frequencies.  
▪ Operating temperature: -20°C to +70°C  
• Frequency stability options: ±20, ±25, ±50, or ±100 ppm  
(XO only)  
• ±50ppm APR (VCXO only)  
▪ Operating temperature: -40°C to +85°C  
• Frequency stability options: ±25, ±50, or ±100 ppm  
(XO only)  
• ±50ppm APR (VCXO only)  
▪ Operating temperature: -40°C to +105°C (XO only)  
• Frequency stability options: ±50 or ±100 ppm  
▪ kV of 85ppm/volt typical from 0.5VDC to VDD (VCXO only)  
• Better than ±10% linearity for Vc range  
Pin Assignments (XO option)  
NOTE: To minimize power supply line noise, a 0.01μF bypass capacitor should be placed between VDD (Pin 6) and GND (Pin 3) on 6-pin  
devices, or VDD (Pin 4) and GND (Pin 2) on 4-pin devices.  
4
1
3
6
1
5
4
2
2
3
Table 1. XO 6-pin Package  
Table 2. XO 4-pin Package  
Number  
Name  
Description  
Number  
Name  
Description  
[a][b]  
[a][b]  
1
E/D  
NC  
Enable/Disable  
No connect  
1
2
3
4
E/D  
GND  
OUT  
Enable/Disable  
Connect to ground  
Output  
2
NC  
E/D  
No connect  
[a][b]  
Enable/Disable  
V
Supply voltage  
DD  
3
4
5
6
GND  
OUT  
Connect to ground  
Output  
[a] Pulled high internally.  
[b] Low = output disabled.  
OUT2  
Complementary output  
Supply voltage  
See Ordering Information (XO) for more details.  
V
DD  
©2018 Integrated Device Technology, Inc.  
1 September 7, 2018  
 
 
 
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