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XC74WL125ASR_001 PDF预览

XC74WL125ASR_001

更新时间: 2024-11-26 03:02:31
品牌 Logo 应用领域
特瑞仕 - TOREX /
页数 文件大小 规格书
6页 198K
描述
CMOS Logic

XC74WL125ASR_001 数据手册

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XC74WL125ASR  
ETR1320_001  
CMOS Logic  
GENERAL DESCRIPTION  
XC74WL125ASR is dual bus buffer manufactured using silicon gate CMOS processes. The small supply current, which is  
one of the features of the CMOS logic, gives way to high speed operations which enables LS-TTL.  
With wave forming buffers connected internally, stabilized output can be achieved as the series offers high noise immunity.  
As the series is integrated into a mini molded, MSOP-8B package, high density mounting is possible.  
APPLICATIONS  
Palmtops  
FEATURES  
High Speed Operations : tpd = 3.8ns(TYP.) (VCC=5V)  
Operating Voltage Range : 2V ~ 5.5V  
Low Power Consumption: 2μA (MAX.)  
CMOS Logic Dual Bus Buffer  
Digital equipment  
Small Package  
: MSOP-8B  
FUNCTIONS  
PIN CONFIGURATION  
INPUT  
OUTPUT  
G
H
L
A
X
H
L
Y
Z
H
L
L
H=High level  
L=Low level  
X=Don’t care  
MOSP-8  
(TOP VIEW)  
Z=High impedance  
ABSOLUTE MAXIMUM RATINGS  
Ta=-40~85℃  
PARAMETER  
Supply Voltage  
SYMBOL  
VCC  
RATINGS  
-0.5~+6.0  
-0.5~+6.0  
-0.5~VCC+0.5  
-20  
UNITS  
V
V
Input Voltage  
VIN  
Output Voltage  
VOUT  
IIK  
V
Input Diode Current  
Output Diode Current  
Output Current  
mA  
mA  
IOK  
±20  
mA  
mA  
mW  
IOUT  
ICC,IGND  
Pd  
±25  
VCC,GND Current  
±50  
Power Dissipation (Ta = 25)  
Storage Temperature Range  
Note : Voltage is all ground standardized.  
300  
Tstg  
-65~+150  
1/6  

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