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XC6VSX315T-1FFG1759I PDF预览

XC6VSX315T-1FFG1759I

更新时间： 2024-11-25 18:37:55
品牌 Logo 应用领域
赛灵思 - XILINX 时钟栅可编程逻辑
页数 文件大小 规格书
65页 1429K
描述
Field Programmable Gate Array, 1098MHz, 314880-Cell, CMOS, PBGA1759, 42.50 X 42.50 MM, LEAD FREE, FBGA-1759

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XC6VSX315T-1FFG1759I 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：BGA
包装说明：42.50 X 42.50 MM, LEAD FREE, FBGA-1759针数：1759
Reach Compliance Code：not_compliantECCN代码：3A001.A.7.A
HTS代码：8542.39.00.01风险等级：5.2
最大时钟频率：1098 MHzCLB-Max的组合延迟：5.08 ns
JESD-30 代码：S-PBGA-B1759JESD-609代码：e1
长度：42.5 mm湿度敏感等级：4
输入次数：720逻辑单元数量：314880
输出次数：720端子数量：1759
最高工作温度：100 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：BGA
封装等效代码：BGA1759,42X42,40封装形状：SQUARE
封装形式：GRID ARRAY峰值回流温度（摄氏度）：245
电源：1,1.2/2.5 V可编程逻辑类型：FIELD PROGRAMMABLE GATE ARRAY
认证状态：Not Qualified座面最大高度：3.5 mm
子类别：Field Programmable Gate Arrays最大供电电压：1.05 V
最小供电电压：0.95 V标称供电电压：1 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)
端子形式：BALL端子节距：1 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：30
宽度：42.5 mmBase Number Matches：1

XC6VSX315T-1FFG1759I 数据手册

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Virtex-6 FPGA Data Sheet:  
DC and Switching Characteristics  
DS152 (v3.6) March 18, 2014  
Product Specification  
Virtex-6 FPGA Electrical Characteristics  
Virtex®-6 FPGAs are available in -3, -2, -1, and -1L speed grades, with -3 having the highest performance. Virtex-6 FPGA  
DC and AC characteristics are specified in commercial, extended, industrial, and military temperature ranges. Unless noted,  
the Virtex-6Q FPGA DC and AC characteristics are equivalent to the commercial specifications. Except for the operating  
temperature range or unless otherwise noted, all the DC and AC electrical parameters are the same for a particular speed  
grade (that is, the timing characteristics of a -1 speed grade industrial device are the same as for a -1 speed grade  
commercial device). However, only selected speed grades and/or devices are available in the extended, industrial, or military  
temperature ranges.  
All supply voltage and junction temperature specifications are representative of worst-case conditions. The parameters  
included are common to popular designs and typical applications.  
Available device and package combinations can be found at:  
•
•
DS150: Virtex-6 Family Overview  
DS155: Defense-Grade Virtex-6Q Family Overview  
This Virtex-6 FPGA data sheet, part of an overall set of documentation on the Virtex-6 FPGAs, is available on the Xilinx  
website at: www.xilinx.com/support/index.html/content/xilinx/en/supportNav/silicon_devices/fpga/virtex-6.html.  
Virtex-6 FPGA DC Characteristics  
(1)  
Table 1: Absolute Maximum Ratings  
Symbol  
Description  
Internal supply voltage relative to GND  
Range  
–0.5 to 1.1  
–0.5 to 1.0  
–0.5 to 3.0  
–0.5 to 3.0  
–0.5 to 3.0  
–0.5 to 3.0  
–0.5 to 3.0  
–0.5 to VCCO + 0.5  
–0.5 to VCCO + 0.5  
–65 to 150  
+220  
Units  
V
VCCINT  
For -1L devices: Internal supply voltage relative to GND  
Auxiliary supply voltage relative to GND  
V
VCCAUX  
VCCO  
VBATT  
VFS  
V
Output drivers supply voltage relative to GND  
Key memory battery backup supply  
V
V
External voltage supply for eFUSE programming(2)  
Input reference voltage  
V
VREF  
V
VIN  
2.5V or below I/O input voltage relative to GND(4) (user and dedicated I/Os)  
Voltage applied to 3-state 2.5V or below output(4) (user and dedicated I/Os)  
Storage temperature (ambient)  
V
(3)  
VTS  
TSTG  
TSOL  
Tj  
V
°C  
°C  
°C  
Maximum soldering temperature(5)  
Maximum junction temperature(5)  
+125  
Notes:  
1. Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only,  
and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.  
Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.  
2. When not programming eFUSE, connect V to GND.  
FS  
3. 2.5V I/O absolute maximum limit applied to DC and AC signals.  
4. For I/O operation, refer to UG361:Virtex-6 FPGA SelectIO Resources User Guide.  
5. For soldering guidelines and thermal considerations, see UG365:Virtex-6 FPGA Packaging and Pinout Specification.  
© 2009–2014 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Zynq, Artix, Kintex, Spartan, ISE, Vivado and other designated brands included herein are trademarks of Xilinx in the  
United States and other countries. All other trademarks are the property of their respective owners.  
DS152 (v3.6) March 18, 2014  
www.xilinx.com  
Product Specification  
1
 
 
 
 
 
 
 
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XC6VSX315T-1FFG1759I 替代型号

型号 品牌 替代类型 描述 数据表
XC6VSX315T-2FFG1759C XILINX

完全替代

 Field Programmable Gate Array, 1286MHz, 314880-Cell, CMOS, PBGA1759, 42.50 X 42.50 MM, LEA
XC6VSX315T-2FFG1759I XILINX

完全替代

 Field Programmable Gate Array, 1286MHz, 314880-Cell, CMOS, PBGA1759, 42.50 X 42.50 MM, LEA

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XC6VSX315T-1LFF1759C XILINX

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XC6VSX315T-1LFF1759I XILINX

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 		Field Programmable Gate Array, PBGA1759, FBGA-1759
XC6VSX315T-1LFFG1759C XILINX

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XC6VSX315T-2FF1156C XILINX

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 		Field Programmable Gate Array, 1286MHz, 314880-Cell, CMOS, PBGA1156, FBGA-1156
XC6VSX315T-2FF1156I XILINX

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 		Field Programmable Gate Array, 1286MHz, 314880-Cell, CMOS, PBGA1156, FBGA-1156
XC6VSX315T-2FF1759E XILINX

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 		Field Programmable Gate Array, 1286MHz, 314880-Cell, CMOS, PBGA1759, FBGA-1759
XC6VSX315T-2FFG1156C XILINX

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 		Field Programmable Gate Array, 1286MHz, 314880-Cell, CMOS, PBGA1156, 35 X 35 MM, LEAD FREE
XC6VSX315T-2FFG1156E XILINX

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 		Field Programmable Gate Array, 1286MHz, 314880-Cell, CMOS, PBGA1156,
XC6VSX315T-2FFG1156I XILINX

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 		Field Programmable Gate Array, 1286MHz, 314880-Cell, CMOS, PBGA1156, 35 X 35 MM, LEAD FREE

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