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XC6114E538ML

更新时间: 2024-11-23 13:16:07
品牌 Logo 应用领域
特瑞仕 - TOREX /
页数 文件大小 规格书
26页 522K
描述
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO5, SOT-25, 5 PIN

XC6114E538ML 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:LSSOP,Reach Compliance Code:compliant
风险等级:5.72其他特性:DETECT VOLTAGE IS 3.8 V
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码:R-PDSO-G5长度:2.9 mm
湿度敏感等级:1信道数量:1
功能数量:1端子数量:5
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260座面最大高度:1.3 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):1 V
标称供电电压 (Vsup):2 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.95 mm
端子位置:DUAL处于峰值回流温度下的最长时间:10
宽度:1.6 mmBase Number Matches:1

XC6114E538ML 数据手册

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Preliminary  
CMOS Voltage Detector  
Manual Reset Input  
APPLICATIONS  
Microprocessor reset circuits  
Memory battery backup circuits  
System power-on reset circuits  
Power failure detection  
Watchdog Functions  
Built-in Delay Circuit  
Detect Voltage Range: 1.6~5.0V, ± 2%  
Reset Function is Selectable  
VDFL (Low When Detected)  
VDFH (High When Detected)  
FEATURES  
GENERAL DESCRIPTION  
The XC6101~XC6107, XC6111~XC6117 series are  
groups of high-precision, low current consumption voltage  
detectors with manual reset input function and watchdog  
functions incorporating CMOS process technology. The  
series consist of a reference voltage source, delay circuit,  
comparator, and output driver.  
Detect Voltage Range  
Hysteresis Range  
: 1.6V ~ 5.0V, +2%  
(100mV increments)  
: VDF x 5%, TYP.  
(XC6101~XC6107)  
VDF x 0.1%, TYP.  
(XC6111~XC6117)  
Operating Voltage Range : 1.0V ~ 6.0V  
With the built-in delay circuit, the XC6101 ~ XC6107,  
XC6111 ~ XC6117 series’ ICs do not require any external  
components to output signals with release delay time.  
Moreover, with the manual reset function, reset can be  
asserted at any time. The ICs produce two types of  
output; VDFL (low when detected) and VDFH (high when  
detected).  
Detect Voltage Temperature  
Characteristics  
: +100ppm/OC (TYP.)  
Output Configuration  
: N-channel open drain,  
CMOS  
Watchdog Pin  
: Watchdog input  
If watchdog input maintains  
‘H’ or ‘L’ within the watchdog  
timeout period, a reset signal  
is output to the RESET  
output pin  
With the XC6101 ~ XC6105, XC6111 ~ XC6115 series’  
ICs, the WD pin can be left open if the watchdog function  
is not used.  
Whenever the watchdog pin is opened, the internal  
counter clears before the watchdog timeout occurs.  
Since the manual reset pin is internally pulled up to the VIN  
pin voltage level, the ICs can be used with the manual  
reset pin left unconnected if the pin is unused.  
Manual Reset Pin  
: When driven ‘H’ to ‘L’ level  
signal, the MRB pin voltage  
asserts forced reset on the  
output pin.  
Release Delay Time  
: 1.6sec, 400msec, 200msec,  
100msec, 50msec, 25msec,  
3.13msec (TYP.) can be  
selectable.  
The detect voltages are internally fixed 1.6V ~ 5.0V in  
increments of 100mV, using laser trimming technology.  
Six watchdog timeout period settings are available in a  
range from 6.25msec to 1.6sec.  
Watchdog Timeout Period : 1.6sec, 400msec, 200msec,  
Seven release delay time 1 are available in a range from  
3.13msec to 1.6sec.  
100msec, 50msec,  
6.25msec (TYP.) can be  
selectable.  
TYPICAL APPLICATION CIRCUIT  
TYPICAL PERFORMANCE  
CHARACTERISTICS  
Supply Current vs. Input Voltage  
XC61X1~ XC61X5 (2.7V)  
30  
25  
20  
Ta=25  
Ta=85  
15  
10  
Ta=-40  
5
5
0
* Not necessary with CMOS output products.  
0
1
2
3
4
6
Input Voltage: VIN (V)  
* ‘x’ represents both ‘0’ and ‘1’. (ex. XC61x1XC6101 and XC6111)  
1/26  
XC6101_07_XC6111_17 ETR0207_009  

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