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XC25BS3X03MX PDF预览

XC25BS3X03MX

更新时间: 2024-12-01 04:24:23
品牌 Logo 应用领域
特瑞仕 - TOREX /
页数 文件大小 规格书
10页 626K
描述
CMOS Low Power Consumption

XC25BS3X03MX 数据手册

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APPLICATIONS  
Crystal oscillation modules  
CMOS Low Power Consumption  
Input Frequency : 14kHz ~ 35MHz  
Divider Ratio  
: 1~ 2047 Divisions  
(Laser Trimming)  
Microcontroller  
Multiplier Ratio  
: 20 ~ 2047 Multiplications  
(Laser Trimming)  
PDAs  
Portable audio systems  
Various system clocks  
Comparative Frequency  
: 14kHz ~ 500kHz  
Output Frequency : 9MHz ~ 80MHz  
GENERAL DESCRIPTION  
FEATURES  
The XC25BS3 series are high frequency, low power  
consumption PLL clock generator ICs with built-in crystal  
oscillator circuit, divider circuit & multiplier PLL circuit.  
Output Frequency  
Reference Oscillation  
(fCLKin)  
: 9MHz ~ 80MHz (Q0=fCLKin×N/M)  
: 14kHz ~ 35MHz  
Laser trimming gives the option of being able to select from  
divider ratios (M) of 1 to 2047 and multiplier ratio (N) of 20 to  
2047. Output frequency (Q0) is equal to reference oscillation  
(fCLKin) multiplied by N/M, within a range of 9MHz to 80MHz.  
Q1 output is selectable from input reference frequency (f0),  
Ground (GND), PLL output frequency/2 (Q0/2), and  
comparative frequency/2 (f0/M/2). Reference oscillation can  
input 14kHz to 35MHz of reference clock. Further, comparative  
frequency, within a range of 14kHz to 500kHz, can be obtained  
by dividing the reference oscillation. By halting oscillation via  
the CE pin, consumption current can be controlled. Output will  
be one of high impedance.  
Divider Ratio (M)  
Multiplier Ratio (N)  
: Selectable from divisions of 1 ~ 2047  
: Selectable from multiplications  
of 20 ~ 2047  
Output  
: 3-State  
Q1 output selectable from  
reference oscillation, GND, PLL  
output frequency/2, comparative  
frequency/2.  
Operating Voltage Range: 2.97V ~ 5.5V  
Low Power Consumption: CMOS (stand-by function included)*1  
Ultra Small Package  
: SOT-26, USP-6B  
*1 High output impedance during stand-by  
PIN ASSIGNMENT  
PIN CONFIGURATION  
PIN NUMBER  
SOT-26 USP-6B  
PIN NAME  
FUNCTION  
Q0  
Q1  
VDD  
VSS  
CE  
1
2
3
3
2
1
CE  
VSS  
Q0  
Chip Enable  
GND  
PLL Output  
CLKin  
SOT-26  
(TOP VIEW)  
Reference Oscillation, GND,  
Comparative Frequency/2,  
or PLL Output/2 Output *  
*The dissipation pad for the USP-6B  
package should be solder-plated in  
recommended mount pattern and metal  
masking so as to enhance mounting  
strength and heat release.  
4
6
Q1  
5
6
5
4
VDD  
CLKin  
Power Supply  
Reference Clock Input  
If the pad needs to be connected to other  
pins, it should be connected to the VDD  
pin.  
* Q1 Output is selectable from the above mentioned functions.  
1/10  
XC25BS3 ETR1501_003  

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