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XA6SLX16-2CSG324C PDF预览

XA6SLX16-2CSG324C

更新时间: 2024-02-25 16:11:42
品牌 Logo 应用领域
赛灵思 - XILINX 可编程逻辑
页数 文件大小 规格书
89页 1903K
描述
Field Programmable Gate Array,

XA6SLX16-2CSG324C 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:,Reach Compliance Code:compliant
风险等级:5.8JESD-609代码:e1
湿度敏感等级:3峰值回流温度(摄氏度):260
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY端子面层:TIN SILVER COPPER
处于峰值回流温度下的最长时间:30Base Number Matches:1

XA6SLX16-2CSG324C 数据手册

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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics  
Table 4: DC Characteristics Over Recommended Operating Conditions  
Symbol  
VDRINT  
VDRAUX  
Description  
Min  
0.8  
Typ  
Max Units  
Data retention VCCINT voltage (below which configuration data might be lost)  
Data retention VCCAUX voltage (below which configuration data might be lost)  
VREF leakage current per pin for commercial (C) and industrial (I) devices  
VREF leakage current per pin for expanded (Q) devices  
V
2.0  
V
–10  
–15  
10  
15  
10  
µA  
µA  
µA  
IREF  
Input or output leakage current per pin (sample-tested) for commercial (C) and industrial –10  
(I) devices  
IL  
Input or output leakage current per pin (sample-tested) for expanded (Q) devices  
–15  
–20  
15  
20  
µA  
µA  
All pins except PROGRAM_B, DONE, and  
JTAG pins when HSWAPEN = 1  
Leakage current on pins during hot  
IHS  
socketing with FPGA unpowered  
PROGRAM_B, DONE, and JTAG pins, or other  
IHS + IRPU  
µA  
pins when HSWAPEN = 0  
(1)  
CIN  
Die input capacitance at the pad  
200  
120  
60  
40  
12  
200  
140  
10  
500  
350  
200  
150  
100  
550  
400  
150  
pF  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
nA  
Pad pull-up (when selected) @ VIN = 0V, VCCO = 3.3V or VCCAUX = 3.3V  
Pad pull-up (when selected) @ VIN = 0V, VCCO = 2.5V or VCCAUX = 2.5V  
Pad pull-up (when selected) @ VIN = 0V, VCCO = 1.8V  
Pad pull-up (when selected) @ VIN = 0V, VCCO = 1.5V  
Pad pull-up (when selected) @ VIN = 0V, VCCO = 1.2V  
Pad pull-down (when selected) @ VIN = VCCO, VCCAUX = 3.3V  
Pad pull-down (when selected) @ VIN = VCCO, VCCAUX = 2.5V  
Battery supply current  
IRPU  
IRPD  
(2)  
IBATT  
(3)  
RDT  
Resistance of optional input differential termination circuit, VCCAUX = 3.3V  
100  
25  
Thevenin equivalent resistance of programmable input termination to VCCO  
(UNTUNED_SPLIT_25) for commercial (C) and industrial (I) devices  
23  
55  
Thevenin equivalent resistance of programmable input termination to VCCO  
(UNTUNED_SPLIT_25) for expanded (Q) devices  
20  
39  
32  
56  
47  
25  
50  
50  
75  
75  
55  
72  
Thevenin equivalent resistance of programmable input termination to VCCO  
(UNTUNED_SPLIT_50) for commercial (C) and industrial (I) devices  
(5)  
RIN_TERM  
Thevenin equivalent resistance of programmable input termination to VCCO  
(UNTUNED_SPLIT_50) for expanded (Q) devices  
74  
Thevenin equivalent resistance of programmable input termination to VCCO  
(UNTUNED_SPLIT_75) for commercial (C) and industrial (I) devices  
109  
115  
Thevenin equivalent resistance of programmable input termination to VCCO  
(UNTUNED_SPLIT_75) for expanded (Q) devices  
Thevenin equivalent resistance of programmable output termination (UNTUNED_25)  
11  
21  
29  
25  
50  
75  
52  
96  
ROUT_TERM Thevenin equivalent resistance of programmable output termination (UNTUNED_50)  
Thevenin equivalent resistance of programmable output termination (UNTUNED_75)  
145  
Notes:  
1. The C measurement represents the die capacitance at the pad, not including the package.  
IN  
2. Maximum value specified for worst case process at 25°C. LX75, LX75T, LX100, LX100T, LX150, and LX150T only.  
3. Refer to IBIS models for R variation and for values at V = 2.5V. IBIS values for R are valid for all temperature ranges.  
DT  
CCAUX  
DT  
4.  
V
is not required for data retention. The minimum V  
for power-on reset and configuration is 1.65V.  
CCO2  
CCO2  
5. Termination resistance to a V  
/2 level.  
CCO  
DS162 (v3.0) October 17, 2011  
www.xilinx.com  
Product Specification  
5

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