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XA6SLX45-2CSG324Q PDF预览

XA6SLX45-2CSG324Q

更新时间： 2024-11-10 19:15:27
品牌 Logo 应用领域
赛灵思 - XILINX 时钟栅可编程逻辑
页数 文件大小 规格书
10页 288K
描述
Field Programmable Gate Array, 62.5MHz, 43661-Cell, PBGA324,

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XA6SLX45-2CSG324Q 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：FBGA, BGA324,18X18,32Reach Compliance Code：compliant
ECCN代码：3A991.DHTS代码：8542.39.00.01
Factory Lead Time：12 weeks风险等级：5.73
最大时钟频率：62.5 MHzJESD-30 代码：S-PBGA-B324
JESD-609代码：e1湿度敏感等级：3
输入次数：218逻辑单元数量：43661
输出次数：218端子数量：324
封装主体材料：PLASTIC/EPOXY封装代码：FBGA
封装等效代码：BGA324,18X18,32封装形状：SQUARE
封装形式：GRID ARRAY, FINE PITCH峰值回流温度（摄氏度）：260
电源：1.2,2.5/3.3 V可编程逻辑类型：FIELD PROGRAMMABLE GATE ARRAY
认证状态：Not Qualified筛选级别：AEC-Q100
子类别：Field Programmable Gate Arrays表面贴装：YES
端子面层：Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)端子形式：BALL
端子节距：0.8 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：30Base Number Matches：1

XA6SLX45-2CSG324Q 数据手册

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10  
XA Spartan-6 Automotive FPGA  
Family Overview  
DS170 (v1.3) December 13, 2012  
Product Specification  
General Description  
The Xilinx Automotive (XA) Spartan®-6 family of FPGAs provides leading system integration capabilities with the lowest total cost for high-  
volume automotive applications. The ten-member family delivers expanded densities ranging from 3,840 to 101,261 logic cells and faster,  
more comprehensive connectivity. Built on a mature 45 nm low-power copper process technology that delivers the optimal balance of cost,  
power, and performance, the XA Spartan-6 family offers a new, more efficient, dual-register 6-input look-up table (LUT) logic and a rich  
selection of built-in system-level blocks. These include 18 Kb (2 x 9 Kb) block RAMs, second generation DSP48A1 slices, SDRAM  
memory controllers, enhanced mixed-mode clock management blocks, SelectIO™ technology, power-optimized high-speed serial  
transceiver blocks, PCI Express® compatible Endpoint blocks, advanced system-level power management modes, auto-detect  
configuration options, and enhanced IP security with AES and Device DNA protection. These features provide a low-cost programmable  
alternative to custom ASIC products with unprecedented ease of use. XA Spartan-6 FPGAs offer the best solution for flexible and scalable  
high-volume logic designs, high-bandwidth parallel DSP processing designs, and cost-sensitive applications where multiple interfacing  
standards are required. XA Spartan-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver  
integrated software and hardware components that enable designers to focus on innovation as soon as their development cycle begins.  
Summary of XA Spartan-6 FPGA Features  
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XA Spartan-6 Family:  
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Integrated Memory Controller blocks  
•
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XA Spartan-6 LX FPGA: Logic optimized  
XA Spartan-6 LXT FPGA: High-speed serial connectivity  
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DDR, DDR2, DDR3, and LPDDR support  
Data rates up to 800 Mb/s  
Multi-port bus structure with independent FIFO to reduce  
design timing issues  
Automotive Temperatures:  
•
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I-Grade: Tj = –40°C to +100°C  
Q-Grade: Tj = –40°C to +125°C  
•
Abundant logic resources with increased logic capacity  
•
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Optional shift register or distributed RAM support  
Efficient 6-input LUTs improve performance and minimize  
power  
Automotive Standards:  
•
•
•
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Xilinx is ISO-TS16949 compliant  
AEC-Q100 qualification  
Production Part Approval Process (PPAP) documentation  
Beyond AEC-Q100 qualification is available upon request  
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LUT with dual flip-flops for pipeline centric applications  
•
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Block RAM with a wide range of granularity  
•
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Fast block RAM with byte write enable  
18 Kb blocks that can be optionally programmed as two  
independent 9 Kb block RAMs  
•
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Designed for low cost  
•
•
•
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Multiple efficient integrated blocks  
Optimized selection of I/O standards  
Staggered pads  
Clock Management Tile (CMT) for enhanced performance  
High-volume plastic wire-bonded packages  
•
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Low noise, flexible clocking  
Digital Clock Managers (DCMs) eliminate clock skew and  
duty cycle distortion  
Low static and dynamic power  
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45 nm process optimized for cost and low power  
Hibernate power-down mode for zero power  
Suspend mode maintains state and configuration with multi-  
pin wake-up, control enhancement  
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Phase-Locked Loops (PLLs) for low-jitter clocking  
Frequency synthesis with simultaneous multiplication,  
division, and phase shifting  
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Sixteen low-skew global clock networks  
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High performance 1.2V core voltage (LX and LXT FPGAs, -2  
and -3 speed grades)  
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Simplified configuration, supports low-cost standards  
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2-pin auto-detect configuration  
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Multi-voltage, multi-standard SelectIO interface banks  
Broad third-party SPI (up to x4) and NOR flash support  
MultiBoot support for remote upgrade with multiple  
bitstreams, using watchdog protection  
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Up to 1,080 Mb/s data transfer rate per differential I/O  
Selectable output drive, up to 24 mA per pin  
3.3V to 1.2V I/O standards and protocols  
Low-cost HSTL and SSTL memory interfaces  
Hot swap compliance  
Enhanced security for design protection  
•
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Unique Device DNA identifier for design authentication  
AES bitstream encryption in the XA6SLX75, XA6SLX75T,  
and XA6SLX100 devices  
Adjustable I/O slew rates to improve signal integrity  
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High-speed GTP serial transceivers in the LXT FPGAs  
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Up to 3.2 Gb/s  
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Integrated Endpoint block for PCI Express designs (LXT)  
Low-cost PCI® technology support compatible with the 33 MHz,  
32- and 64-bit specification.  
High-speed interfaces including: Serial ATA and PCI Express  
Efficient DSP48A1 slices  
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High-performance arithmetic and signal processing  
Fast 18 x 18 multiplier and 48-bit accumulator  
Pipelining and cascading capability  
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Faster embedded processing with enhanced, low cost,  
MicroBlaze™ 32-bit soft processor  
Industry-leading IP and reference designs  
Strong automotive-specific third-party ecosystem with IP,  
development boards, and design services  
•
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Pre-adder to assist filter applications  
© Copyright 2010–2012 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx  
in the United States and other countries. PCI, PCI Express, PCIe, and PCI-X are trademarks of PCI-SIG. All other trademarks are the property of their respective owners.  
DS170 (v1.3) December 13, 2012  
www.xilinx.com  
Product Specification  
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中文翻译

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XA6SLX45-2CSG324Q 替代型号

型号 品牌 替代类型 描述 数据表
XC6SLX45-2CSG324C XILINX

完全替代

 Field Programmable Gate Array, 3411 CLBs, 667MHz, 43661-Cell, CMOS, PBGA324, 15 X 15 MM, 0

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