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X9410WP24I PDF预览

X9410WP24I

更新时间: 2024-01-09 01:56:49
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
21页 375K
描述
Low Noise/Low Power/SPI Bus

X9410WP24I 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:PLASTIC, DIP-24Reach Compliance Code:unknown
风险等级:5.8Is Samacsys:N
其他特性:NONVOLATILE MEMORY控制接口:3-WIRE SERIAL
转换器类型:DIGITAL POTENTIOMETERJESD-30 代码:R-PDIP-T24
JESD-609代码:e0长度:31.685 mm
功能数量:2位置数:64
端子数量:24最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.6
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5 V认证状态:Not Qualified
电阻定律:LINEAR最大电阻容差:20%
最大电阻器端电压:最小电阻器端电压:-5.5 V
座面最大高度:4.87 mm子类别:Digital Potentiometers
标称供电电压:5 V表面贴装:NO
技术:CMOS标称温度系数:300 ppm/ °C
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL标称总电阻:10000 Ω
宽度:15.24 mmBase Number Matches:1

X9410WP24I 数据手册

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X9410  
®
Low Noise/Low Power/SPI Bus  
Data Sheet  
September 19, 2005  
FN8193.1  
DESCRIPTION  
Dual Digitally Controlled Potentiometer  
(XDCP™)  
The X9410 integrates two digitally controlled  
potentiometers (XDCPs) on a monolithic CMOS  
integrated circuit.  
FEATURES  
• Two potentiometers per package  
• SPI serial interface  
• Register oriented format  
The digitally controlled potentiometer is implemented  
using 63 resistive elements in a series array. Between  
each element are tap points connected to the wiper  
terminal through switches. The position of the wiper on  
the array is controlled by the user through the SPI  
serial bus interface. Each potentiometer has  
associated with it a volatile Wiper Counter Register  
(WCR) and four nonvolatile Data Registers (DR0:DR3)  
that can be directly written to and read by the user.  
The contents of the WCR controls the position of the  
wiper on the resistor array through the switches.  
Power-up recalls the contents of DR0 to the WCR.  
- Direct read/write/transfer wiper positions  
- Store as many as four positions per  
potentiometer  
• Power supplies  
- V = 2.7V to 5.5V  
CC  
- V+ = 2.7V to 5.5V  
- V- = -2.7V to -5.5V  
• Low power CMOS  
- Standby current < 1µA  
- High reliability  
The XDCP can be used as a three-terminal  
potentiometer or as a two-terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
- Endurance - 100,000 data changes per bit per  
register  
- Register data retention - 100 years  
• 8-bytes of nonvolatile EEPROM memory  
• 10kresistor arrays  
• Resolution: 64 taps each pot  
• 24 Ld SOIC, 24 Ld TSSOP, and 24 Ld plastic DIP  
packages  
• Pb-free plus anneal available (RoHS compliant)  
BLOCK DIAGRAM  
VCC  
VSS  
Pot 0  
R0 R1  
VH0/RH0  
Wiper  
Counter  
Register  
(WCR)  
V+  
V-  
VL0/RL0  
R2 R3  
HOLD  
CS  
VW0/RW0  
SCK  
SO  
SI  
Interface  
and  
Control  
8
Circuitry  
A0  
A1  
VW1/RW1  
Pot 1  
Data  
WP  
R0 R1  
R2 R3  
V
H1/RH1  
Wiper  
Counter  
Register  
(WCR)  
Resistor  
Array  
Pot1  
VL1/RL1  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  

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