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X9409WZ24I-2.7 PDF预览

X9409WZ24I-2.7

更新时间: 2024-02-26 19:51:48
品牌 Logo 应用领域
瑞萨 - RENESAS 转换器电阻器
页数 文件大小 规格书
21页 376K
描述
QUAD 10K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PBGA24, XBGA-24

X9409WZ24I-2.7 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:XBGA-24Reach Compliance Code:unknown
风险等级:5.78Is Samacsys:N
其他特性:NONVOLATILE MEMORY控制接口:2-WIRE SERIAL
转换器类型:DIGITAL POTENTIOMETERJESD-30 代码:R-PBGA-B24
JESD-609代码:e0长度:3.861 mm
功能数量:4位置数:64
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:VFBGA封装等效代码:BGA24,4X6,20
封装形状:RECTANGULAR封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH
电源:3/5 V认证状态:Not Qualified
电阻定律:LINEAR最大电阻容差:20%
最大电阻器端电压:5.5 V最小电阻器端电压:
座面最大高度:0.635 mm子类别:Digital Potentiometers
标称供电电压:3 V表面贴装:YES
技术:CMOS标称温度系数:300 ppm/ °C
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM标称总电阻:10000 Ω
宽度:2.642 mmBase Number Matches:1

X9409WZ24I-2.7 数据手册

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X9409  
®
Low Noise/Low Power/2-Wire Bus  
Data Sheet  
March 7, 2005  
FN8192.0  
PRELIMINARY  
DESCRIPTION  
The X9409 integrates  
potentiometers (XDCP) on a monolithic CMOS  
integrated microcircuit.  
Quad Digitally Controlled Potentiometers  
(XDCP™)  
4
digitally controlled  
FEATURES  
• Four potentiometers per package  
• 64 resistor taps  
The digitally controlled potentiometer is implemented  
using 63 resistive elements in a series array. Between  
each element are tap points connected to the wiper  
terminal through switches. The position of the wiper on  
the array is controlled by the user through the 2-wire  
bus interface. Each potentiometer has associated with  
it a volatile Wiper Counter Register (WCR) and 4  
nonvolatile Data Registers (DR0:DR3) that can be  
directly written to and read by the user. The contents  
of the WCR controls the position of the wiper on the  
resistor array through the switches. Power-up recalls  
the contents of DR0 to the WCR.  
• 2-wire serial interface for write, read, and trans-  
fer operations of the potentiometer  
• 50Wiper resistance, typical at 5V.  
• Four non-volatile data registers for each  
potentiometer  
• Non-volatile storage of multiple wiper position  
• Power-on recall. Loads saved wiper position on  
power-up.  
• Standby current < 1µA typical  
• System V : 2.7V to 5.5V operation  
CC  
• 10k, 2.5kEnd to end resistance  
• 100 yr. data retention  
The XDCP can be used as  
a three-terminal  
• Endurance: 100,000 data changes per bit per  
register  
• Low power CMOS  
potentiometer or as a two-terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
• 24-lead SOIC, 24-lead TSSOP, and  
24-lead CSP (Chip Scale Package) Packages  
BLOCK DIAGRAM  
Pot 0  
V
CC  
R
R
R
R
V
/R  
H0 HO  
R
R
R
R
V
0
2
1
0
2
1
SS  
Wiper  
Counter  
Register  
(WCR)  
Wiper  
Counter  
Register  
(WCR)  
V
/R  
H2 H2  
Resistor  
Array  
Pot 2  
V
R
/
L0  
3
WP  
3
LO  
V
/R  
L2 L2  
V
R
/
W0  
SCL  
SDA  
A0  
V
/R  
W2 W2  
WO  
Interface  
and  
Control  
A1  
8
Circuitry  
A2  
V
R
/
A3  
W1  
Data  
V
/R  
W3 W3  
W1  
R
R
R
R
0
2
1
R
R
R
R
V
R
/
Wiper  
Counter  
Register  
(WCR)  
0
1
H1  
V
/R  
Wiper  
Counter  
Register  
(WCR)  
H3 H3  
Resistor  
Array  
Pot 1  
H1  
Resistor  
Array  
Pot 3  
3
V
/R  
2
3
L1 L1  
V
/R  
L3 L3  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  

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