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X9317

更新时间： 2024-11-24 14:58:19
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瑞萨 - RENESAS /
页数 文件大小 规格书
14页 739K
描述
Digitally Controlled Potentiometer (XDCP?)

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中文翻译

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X9317 数据手册

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DATASHEET  
X9317  
FN8183  
Rev 10.00  
Dec 17, 2018  
Low Noise, Low Power, 100 Taps, Digitally Controlled Potentiometer (XDCP™)  
The Intersil X9317 is a digitally controlled potentiometer  
Features  
(XDCP™). The device consists of a resistor array, wiper  
switches, a control section, and nonvolatile memory. The wiper  
position is controlled by a 3-wire interface.  
• Solid-state potentiometer  
• 3-wire serial up/down interface  
• 100 wiper tap points  
The potentiometer is implemented by a resistor array  
composed of 99 resistive elements and a wiper switching  
network. Between each element and at either end are tap  
points accessible to the wiper terminal. The position of the  
wiper element is controlled by the CS, U/D, and INC inputs. The  
position of the wiper can be stored in nonvolatile memory and  
then be recalled upon a subsequent power-up operation.  
- Wiper position stored in nonvolatile memory and recalled  
on power-up  
• 99 resistive elements  
- Temperature compensated  
- End-to-end resistance range ±20%  
The device can be used as a three-terminal potentiometer for  
voltage control or as a two-terminal variable resistor for current  
control in a wide variety of applications.  
• Low power CMOS  
- V = 2.7V to 5.5V, and 5V ±10%  
CC  
- Standby current <5µA  
Applications  
• LCD bias control  
• High reliability  
- Endurance, 100,000 data changes per bit  
- Register data retention, 100 years  
• DC bias adjustment  
• R  
TOTAL  
values = 10kΩ, 50kΩ, 100kΩ  
• Gain and offset trim  
• Packages  
• Laser diode bias control  
• Voltage regulator output control  
- 8 Ld SOIC, TSSOP, and MSOP  
• Pb-free (RoHS compliant)  
U/D  
INC  
R
99  
H
UP/DOWN  
COUNTER  
V
(SUPPLY VOLTAGE)  
CC  
CS  
98  
97  
96  
R
R
UP/DOWN  
(U/D)  
H
7-BIT  
NONVOLATILE  
MEMORY  
ONE  
OF  
ONE  
CONTROL  
AND  
MEMORY  
INCREMENT  
(INC)  
W
WIPER  
SWITCHES  
RESISTOR  
ARRAY  
HUNDRED  
DECODER  
DEVICE SELECT  
(CS)  
R
L
2
STORE AND  
RECALL  
CONTROL  
CIRCUITRY  
V
(GROUND)  
1
0
SS  
V
V
CC  
SS  
GENERAL  
R
R
L
W
DETAILED  
FIGURE 1. BLOCK DIAGRAM  
FN8183 Rev 10.00  
Dec 17, 2018  
Page 1 of 13  
©2014-2023 Renesas Electronics  
1234567...14

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