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X9261UZ24I PDF预览

X9261UZ24I

更新时间: 2024-12-02 07:26:59
品牌 Logo 应用领域
XICOR 转换器电阻器
页数 文件大小 规格书
24页 148K
描述
Digital Potentiometer, 2 Func, 50000ohm, 3-wire Serial Control Interface, 256 Positions, CMOS, PBGA24, XBGA-24

X9261UZ24I 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:XBGA-24Reach Compliance Code:unknown
风险等级:5.78其他特性:NONVOLATILE MEMORY
控制接口:3-WIRE SERIAL转换器类型:DIGITAL POTENTIOMETER
JESD-30 代码:R-PBGA-B24JESD-609代码:e0
长度:4.561 mm功能数量:2
位置数:256端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:VFBGA
封装等效代码:BGA24,4X6,20封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
电阻定律:LINEAR最大电阻容差:20%
最大电阻器端电压:5 V最小电阻器端电压:
座面最大高度:0.763 mm子类别:Digital Potentiometers
标称供电电压:5 V表面贴装:YES
技术:CMOS标称温度系数:300 ppm/ °C
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
标称总电阻:50000 Ω宽度:2.783 mm

X9261UZ24I 数据手册

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APPLICATION NOTES AND DEVELOPMENT SYSTEM  
A V A I L A B L E  
AN99 • AN115 • AN124 •AN133 • AN134 • AN135  
Single Supply / Low Power / 256-tap / SPI bus  
X9261  
Dual Digitally-Controlled (XDCPTM) Potentiometers  
FEATURES  
DESCRIPTION  
• Dual–Two Separate Potentiometers  
• 256 resistor taps/pot–0.4% resolution  
• SPI Serial Interface for write, read, and transfer  
operations of the potentiometer  
• Wiper Resistance, 100typical @ V+ = 5V,V- = -5V  
• 4 Nonvolatile Data Registers for Each  
Potentiometer  
• Nonvolatile Storage of Multiple Wiper Positions  
• Power On Recall. Loads Saved Wiper Position on  
Power Up.  
The X9261 integrates  
potentiometer (XDCP) on  
integrated circuit.  
2
digitally controlled  
monolithic CMOS  
a
The digital controlled potentiometer is implemented  
using 255 resistive elements in a series array. Between  
each element are tap points connected to the wiper  
terminal through switches. The position of the wiper on  
the array is controlled by the user through the SPI bus  
interface. Each potentiometer has associated with it a  
volatile Wiper Counter Register (WCR) and a four  
nononvolatile Data Registers that can be directly  
written to and read by the user. The contents of the  
WCR controls the position of the wiper on the resistor  
array though the switches. Powerup recalls the  
contents of the default Data Register (DR0) to the  
WCR.  
• Standby Current < 5µA Max  
• V : 2.7V to 5.5V Operation  
CC  
• 50K, 100Kversions of End to End Resistance  
• 100 yr. Data Retention  
• Endurance: 100,000 Data Changes per Bit per  
Register  
• 24-Lead SOIC, 24-Lead XBGA  
• Low Power CMOS  
The XDCP can be used as  
a three-terminal  
• Power Supply V  
= 2.7V to 5.5V  
potentiometer or as a two terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
CC  
FUNCTIONAL DIAGRAM  
V
R
R
H1  
CC  
H0  
Write  
Read  
Address  
Data  
Status  
Transfer  
Inc/Dec  
Power On Recall  
Bus  
SPI  
Bus  
Interface  
Wiper Counter  
Register (WCR)  
Interface  
and Control  
Data Registers  
(DR0-DR3)  
Control  
V
R
R
R
R
L1  
SS  
W0  
L0  
W1  
50Kor 100Kversions  
Characteristics subject to change without notice. 1 of 24  
REV 1.1.3 02/26/02  
www.xicor.com  

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