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X9251

更新时间： 2024-11-18 22:41:23
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XICOR /
页数 文件大小 规格书
25页 548K
描述
Quad Digitally-Controlled (XDCP) Potentiometer

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中文翻译

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X9251 数据手册

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APPLICATION NOTES AND DEVELOPMENT SYSTEM  
A V A I L A B L E  
AN99 • AN115 • AN124 •AN133 • AN134 • AN135  
Single Supply / Low Power / 256-tap / SPI bus  
X9251  
Quad Digitally-Controlled (XDCPTM) Potentiometer  
FEATURES  
DESCRIPTION  
• Four potentiometers in one package  
• 256 resistor taps–0.4% resolution  
• SPI Serial Interface for write, read, and transfer  
operations of the potentiometer  
The X9251 integrates four digitally controlled potentio-  
meters (XDCP) on a monolithic CMOS integrated  
circuit.  
The digitally controlled potentiometers are imple-  
mented with a combination of resistor elements and  
CMOS switches. The position of the wipers are  
controlled by the user through the SPI bus interface.  
Each potentiometer has associated with it a volatile  
Wiper Counter Register (WCR) and four non-volatile  
Data Registers that can be directly written to and read  
by the user. The content of the WCR controls the  
position of the wiper. At power-up, the device recalls  
the content of the default Data Registers of each DCP  
(DR00, DR10, DR20, and DR30) to the corresponding  
WCR.  
• Wiper resistance: 100Ω typical @ V  
= 5V  
CC  
• 4 Non-volatile data registers for each  
potentiometer  
• Non-volatile storage of multiple wiper positions  
• Standby current < 5µA max  
• V : 2.7V to 5.5V Operation  
CC  
• 50KΩ, 100KΩ versions of total resistance  
• 100 yr. data retention  
• Single supply version of X9250  
• Endurance: 100,000 data changes per bit per  
register  
• 24-lead SOIC, 24-lead TSSOP, 24-lead CSP  
(Chip Scale Package)  
The XDCP can be used as  
a three-terminal  
• Low power CMOS  
potentiometer or as a two terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
FUNCTIONAL DIAGRAM  
R
R
H3  
R
R
V
H1  
H2  
H0  
CC  
HOLD  
DCP1  
DCP3  
DCP2  
DCP0  
WCR1  
DR10  
DR11  
DR12  
DR13  
WCR3  
DR30  
DR31  
DR32  
DR33  
WCR2  
DR20  
DR21  
DR22  
DR23  
WCR0  
DR00  
DR01  
DR02  
DR03  
A1  
A0  
SO  
SI  
SPI  
Interface  
POWER UP,  
INTERFACE  
CONTROL  
AND  
STATUS  
SCK  
CS  
V
R
R
L3  
R
R
SS  
R
R
R
W3  
WP  
R
W0  
L1  
L2  
L0  
W1  
W2  
Characteristics subject to change without notice. 1 of 25  
REV 1.3.3 2/10/04  
www.xicor.com  
1234567...25

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