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X9250US24I-2.7T2 PDF预览

X9250US24I-2.7T2

更新时间： 2023-01-03 06:13:29
品牌 Logo 应用领域
XICOR 光电二极管
页数 文件大小 规格书
21页 158K
描述
Digital Potentiometer, 4 Func, 50000ohm, 3-wire Serial Control Interface, 256 Positions, CMOS, PDSO24, PLASTIC, SOIC-24

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X9250US24I-2.7T2 数据手册

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APPLICATION NOTE  
A V A I L A B L E  
AN99 • AN115 • AN120 • AN124 • AN133 • AN134 • AN135  
Low Noise/Low Power/SPI Bus/256 Taps  
X9250  
Quad Digitally Controlled Potentiometers (XDCP™)  
FEATURES  
DESCRIPTION  
• Four potentiometers in one package  
• 256 resistor taps/pot–0.4% resolution  
• SPI serial interface  
The X9250 integrates  
potentiometers (XDCP) on a monolithic CMOS  
integrated circuit.  
4
digitally controlled  
• Wiper resistance, 40Ω typical @ V  
= 5V  
CC  
The digitally controlled potentiometer is implemented  
using 255 resistive elements in a series array.  
Between each element are tap points connected to  
the wiper terminal through switches. The position of  
the wiper on the array is controlled by the user through  
the SPI bus interface. Each potentiometer has  
associated with it a volatile Wiper Counter Register  
(WCR) and 4 nonvolatile Data Registers (DR0:DR3)  
that can be directly written to and read by the user.  
The contents of the WCR controls the position of the  
wiper on the resistor array though the switches. Power  
up recalls the contents of DR0 to the WCR.  
• Four nonvolatile data registers for each pot  
• Nonvolatile storage of wiper position  
• Standby current < 5µA max (total package)  
• Power supplies  
—V  
= 2.7V to 5.5V  
CC  
—V+ = 2.7V to 5.5V  
—V– = -2.7V to -5.5V  
• 100KΩ, 50KΩ total pot resistance  
• High reliability  
—Endurance – 100,000 data changes per bit per  
register  
—Register data retention – 100 years  
• 24-lead SOIC, 24-lead TSSOP, 24-lead CSP (Chip  
Scale Package)  
The XDCP can be used as a three-terminal  
potentiometer or as a two-terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
• Dual supply version of X9251  
BLOCK DIAGRAM  
V
V
V+  
V-  
CC  
Pot 0  
SS  
R
R
R
R
V /R  
H0 H0  
R
R
R
R
0
2
1
3
0
2
1
3
Wiper  
V
/R  
Wiper  
Counter  
Register  
(WCR)  
H2 H2  
Resistor  
Array  
Pot 2  
Counter  
Register  
(WCR)  
V
/R  
L0 L0  
HOLD  
V
/R  
L2 L2  
CS  
SCK  
SO  
V
V
/R  
W0 W0  
V
/R  
W2 W2  
Interface  
and  
Control  
SI  
8
Circuitry  
A0  
A1  
/R  
W1 W1  
Data  
V
V
/R  
W3 W3  
WP  
R
R
R
R
0
2
1
3
R
R
R
R
V
/R  
Wiper  
Counter  
Register  
(WCR)  
0
2
1
3
H1 H1  
/R  
Wiper  
Counter  
Register  
(WCR)  
H3 H3  
Resistor  
Array  
Pot1  
Resistor  
Array  
Pot 3  
V
/R  
L1 L1  
V
/R  
L3 H3  
Characteristics subject to change without notice. 1 of 21  
REV 1.2 4/13/04  
www.xicor.com  
1234567...21

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X9250US24Z-2.7 RENESAS

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