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X9250TV24IZ-2.7 PDF预览

X9250TV24IZ-2.7

更新时间: 2024-11-19 04:24:31
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英特矽尔 - INTERSIL 转换器电位器电阻器光电二极管
页数 文件大小 规格书
20页 357K
描述
Quad Digitally Controlled Potentiometers

X9250TV24IZ-2.7 数据手册

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X9250  
®
Low Noise/Low Power/SPI Bus/256 Taps  
Data Sheet  
August 29, 2006  
FN8165.3  
DESCRIPTION  
The X9250 integrates  
Quad Digitally Controlled Potentiometers  
(XDCP™)  
4
digitally controlled  
potentiometers (XDCP) on a monolithic CMOS  
integrated circuit.  
FEATURES  
• Four potentiometers in one package  
• 256 resistor taps/pot - 0.4% resolution  
• SPI serial interface  
The digitally controlled potentiometer is implemented  
using 255 resistive elements in a series array.  
Between each element are tap points connected to the  
wiper terminal through switches. The position of the  
wiper on the array is controlled by the user through the  
SPI bus interface. Each potentiometer has associated  
with it a volatile Wiper Counter Register (WCR) and 4  
nonvolatile Data Registers (DR0:DR3) that can be  
directly written to and read by the user. The contents  
of the WCR controls the position of the wiper on the  
resistor array though the switches. Power up recalls  
the contents of DR0 to the WCR.  
• Wiper resistance, 40typical @ V  
= 5V  
CC  
• Four nonvolatile data registers for each pot  
• Nonvolatile storage of wiper position  
• Standby current < 5µA max (total package)  
• Power supplies  
—V  
= 2.7V to 5.5V  
CC  
—V+ = 2.7V to 5.5V  
—V– = -2.7V to -5.5V  
• 100k, 50ktotal pot resistance  
• High reliability  
—Endurance – 100,000 data changes per bit per  
register  
—Register data retention - 100 years  
• 24 Ld SOIC, 24 Ld TSSOP  
• Dual supply version of X9251  
• Pb-free plus anneal available (RoHS compliant)  
The XDCP can be used as a three-terminal  
potentiometer or as a two-terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
BLOCK DIAGRAM  
V
V
V+  
V-  
CC  
Pot 0  
SS  
R
R
R
R
V
/R  
H0 H0  
R
R
R
R
0
1
0
1
Wiper  
V
/R  
H2 H2  
Wiper  
Counter  
Register  
(WCR)  
Resistor  
Array  
Pot 2  
Counter  
Register  
(WCR)  
V
/R  
L0 L0  
HOLD  
2
3
2
3
V
/R  
L2 L2  
CS  
SCK  
SO  
V
V
/R  
W0 W0  
V
/R  
W2 W2  
Interface  
and  
Control  
SI  
8
Circuitry  
A0  
A1  
/R  
W1 W1  
Data  
V
V
/R  
W3 W3  
WP  
R
R
R
R
0
1
R
R
R
R
V
/R  
H1 H1  
Wiper  
Counter  
Register  
(WCR)  
0
1
3
/R  
Wiper  
Counter  
Register  
(WCR)  
H3 H3  
Resistor  
Array  
Pot1  
Resistor  
Array  
Pot 3  
2
3
V
/R  
L1 L1  
2
V
/R  
L3 H3  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  

X9250TV24IZ-2.7 替代型号

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Low Noise/Low Power/SPI Bus/256 Taps
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