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X68C75

更新时间： 2024-09-25 22:12:35
品牌 Logo 应用领域
XICOR /
页数 文件大小 规格书
26页 126K
描述
Port Expander and E2 Memory

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X68C75 数据手册

 浏览型号X68C75的Datasheet PDF文件第2页浏览型号X68C75的Datasheet PDF文件第3页浏览型号X68C75的Datasheet PDF文件第4页浏览型号X68C75的Datasheet PDF文件第5页浏览型号X68C75的Datasheet PDF文件第6页浏览型号X68C75的Datasheet PDF文件第7页 
APPLICATION NOTES  
A V A I L A B L E  
AN62 • AN64 • AN66 • AN74  
S LIC  
X68C75 SLIC® E2 Microperipheral  
2
Port Expander and E Memory  
FEATURES  
• High Performance CMOS  
—Fast Access Time, 120ns  
—Low Power  
• Highly Integrated Microcontroller Peripheral  
—8K x 8 E Memory  
2
• 60mA Active  
—2 x 8 General Purpose Bidirectional I/O Ports  
—16 x 8 General Purpose Registers  
—Integerated Interrupt Controller Module  
—Internal Programmable Address Decoding  
• Self Loading Integrated Code (SLIC)  
—On-Chip BIOS and Boot Loader  
—IBM/PC Based Interface Software(XSLIC)  
• Concurrent Read During Write  
—Dual Plane Architecture  
• 100µA Standby  
• PDIP, PLCC, and TQFP Packaging Available  
DESCRIPTION  
The X68C75 is a highly integrated peripheral for the  
68HC11 family of microcontrollers. The device inte-  
grates8K-bytesof5Vbyte-alterablenonvolatilememory,  
2 bidirectional 8-bit ports, 16 general purpose registers,  
programmable internal address decoding and a multi-  
plexed address and data bus.  
• Isolates Read/Write Functions Between  
Planes  
• Allows Continuous Execution Of Code  
From One Plane While Writing In The  
Other Plane  
• Multiplexed Address/Data Bus  
—Direct Interface to Popular 68HC11 Family of  
Microcontrollers  
The 5V byte-alterable nonvolatile memory can be used  
as program storage, data storage, or a combination of  
both. The memory array is separated into two 4K-byte  
sections which allows read accesses to one section  
while a write operation is taking place in the other  
section. ThenonvolatilememoryalsofeaturesSoftware  
Data Protection to protect the contents during power  
transitions, and an advanced Block Protect register  
which allows individual blocks of the memory to be  
configured as read-only or read/write.  
• Software Data Protection  
—Protect Entire Array During Power-up/-down  
• Block Lock™ Data Protection  
—Set Write Lockout in 1K Blocks  
• Toggle Bit Polling  
PIN CONFIGURATIONS  
PLCC  
TQFP  
DIP  
RESET  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
V
CC  
A
2
R/W  
12  
WC  
SEL  
3
AS  
INDEX  
CORNER  
4
A
8
A
9
STRA  
5
6
5
4
3
2
1 44 43 42 41 40  
A
6
A
15  
11  
A
A
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
7
11  
14  
13  
NC  
7
NC  
IRQ  
A
8
A
8
IRQ  
14  
STRB  
PA  
PA  
PA  
PA  
PA  
PA  
PA  
PA  
A/D  
9
A
9
STRB  
7
6
5
13  
PB  
7
PB  
10  
11  
12  
13  
14  
15  
16  
17  
PA  
7
PA  
6
PA  
5
PA  
4
PA  
3
PA  
2
PA  
1
PA  
0
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
PB  
7
PB  
6
PB  
5
PB  
4
PB  
3
PB  
2
PB  
1
PB  
0
6
X68C75  
SLIC  
PB  
5
PB  
4
4
X68C75  
4
3
3
3
PB  
3
PB  
2
1
0
0
2
PB  
1
PB  
0
NC  
NC  
21 22 23  
18 19 20  
24 25 26 27 28  
A/D  
0
A/D  
1
A/D  
2
A/D  
3
E
A
10  
2899 ILL F02.3  
CE  
A/D  
7
A/D  
6
A/D  
5
A/D  
4
V
SS  
2899 ILL F01  
Concurrent Read During Write, Block Lock, and SLIC® E2 are registered trademarks of Xicor, Inc.  
©Xicor, Inc. 1994, 1995, 1996 Patents Pending  
2899-2.1 4/11/97 T0/C0/D1 SH  
Characteristics subject to change without notice  
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