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X5645S14-1.8 PDF预览

X5645S14-1.8

更新时间： 2024-01-07 20:01:35
品牌 Logo 应用领域
其他 - ETC 监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
22页 107K
描述
SPI Serial EEPROM with Supervisory Features

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中文翻译

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X5645S14-1.8 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：SOIC-14Reach Compliance Code：unknown
风险等级：5.87可调阈值：NO
模拟集成电路 - 其他类型：POWER SUPPLY SUPPORT CIRCUITJESD-30 代码：R-PDSO-G14
JESD-609代码：e0长度：8.65 mm
信道数量：1功能数量：1
端子数量：14最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：Not Qualified座面最大高度：1.75 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.8 V
表面贴装：YES温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3.9 mm

X5645S14-1.8 数据手册

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Replaces X25643/X25645  
X5643/X5645  
CPU Supervisor with 64Kb SPI EEPROM  
FEATURES  
• Selectable Watchdog Timer  
• Low V Detection and Reset Assertion  
DESCRIPTION  
These devices combine four popular functions, Power-on  
Reset Control, Watchdog Timer, Supply Voltage Supervi-  
sion, and Block Lock™ Protect Serial EEPROM Memory  
in one package. This combination lowers system cost,  
reduces board space requirements, and increases reli-  
ability.  
CC  
—Five standard reset threshold voltages  
—Re-program low V reset threshold voltage  
CC  
using special programming sequence  
—Reset signal valid to V =1V  
CC  
• DetermineWatchdog or LowVoltage Reset with a  
Volatile Flag bit  
Applying power to the device activates the power on  
reset circuit which holds RESET/RESET active for a  
period of time. This allows the power supply and oscilla-  
tor to stabilize before the processor can execute code.  
• Long Battery Life With Low Power Consumption  
—<50µA max standby current, watchdog on  
—<1µA max standby current, watchdog off  
—<400µA max active current during read  
• 64K Bits of EEPROM  
• Built-In Inadvertent Write Protection  
—Power-up/power-down protection circuitry  
—Protect 0, 1/4, 1/2 or all of EEPROM array with  
Block Lock™ protection  
—In circuit programmable ROM mode  
• 2MHz SPI Interface Modes (0,0 & 1,1)  
• Minimize EEPROM Programming Time  
—32 byte page write mode  
The Watchdog Timer provides an independent protection  
mechanism for microcontrollers. When the microcontrol-  
ler fails to restart a timer within a selectable time-out  
interval, the device activates the RESET/RESET signal.  
The user selects the interval from three preset values.  
Once selected, the interval does not change, even after  
cycling the power.  
The device’s low V  
detection circuitry protects the  
CC  
user’s system from low voltage conditions, resetting the  
system when V falls below the minimum V trip  
CC  
CC  
—Self-timed write cycle  
—5ms write cycle time (typical)  
• 1.8V to 3.6V, 2.7V to 5.5V and 4.5V to 5.5V Power  
Supply Operation  
• Available Packages  
point. RESET/RESET is asserted until V  
returns to  
CC  
proper operating level and stabilizes. Five industry stan-  
dard V thresholds are available, however, Xicor’s  
TRIP  
unique circuits allow the thresold to be reprogrammed  
to meet custom requirements or to fine-tune the thresh-  
old for applications requiring higher precision.  
—8-lead PDIP, 14-lead SOIC, 20-lead TSSOP  
BLOCK DIAGRAM  
Watchdog Transition  
Detector  
Watchdog  
Timer Reset  
WP  
Protect Logic  
RESET/RESET  
SI  
Data  
Register  
Status  
Register  
SO  
Command  
Decode &  
Control  
Reset &  
Watchdog  
Timebase  
X5643 = RESET  
X5645 = RESET  
SCK  
16K Bits  
16K bits  
CS/WDI  
Logic  
V
Threshold  
Reset logic  
CC  
32K bits  
Power On and  
Low Voltage  
Reset  
V
+
-
CC  
Generation  
V
TRIP  
Xicor, Inc. 2000 Patents Pending  
9900-3002.5 3/31/00 EP  
Characteristics subject to change without notice. 1 of 22  
1234567...22

中文翻译

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