X5323, X5325
®
(Replaces X25323, X25325)
Data Sheet
October 27, 2005
FN8131.1
DESCRIPTION
CPU Supervisor with 32Kb SPI EEPROM
These devices combine four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage
Supervision, and Block Lock Protect Serial EEPROM
Memory in one package. This combination lowers
system cost, reduces board space requirements, and
increases reliability.
FEATURES
• Selectable watchdog timer
• Low V detection and reset assertion
CC
—Five standard reset threshold voltages
—Re-program low V reset threshold voltage
CC
using special programming sequence
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
—Reset signal valid to V = 1V
CC
• Determine watchdog or low voltage reset with a
volatile flag bit
• Long battery life with low power consumption
—<50µA max standby current, watchdog on
—<1µA max standby current, watchdog off
—<400µA max active current during read
• 32Kbits of EEPROM
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the
RESET/RESET signal. The user selects the interval
from three preset values. Once selected, the interval
does not change, even after cycling the power.
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Protect 0, 1/4, 1/2 or all of EEPROM array with
™
Block Lock protection
The device’s low V
detection circuitry protects the
CC
—In circuit programmable ROM mode
• 2MHz SPI interface modes (0,0 & 1,1)
• Minimize EEPROM programming time
—32-byte page write mode
user’s system from low voltage conditions, resetting the
system when V falls below the minimum V trip
CC
CC
point. RESET/RESET is asserted until V
returns to
CC
proper operating level and stabilizes. Five industry stan-
dard V thresholds are available, however, Intersil’s
—Self-timed write cycle
TRIP
—5ms write cycle time (typical)
• 2.7V to 5.5V and 4.5V to 5.5V power supply
operation
unique circuits allow the threshold to be reprogrammed
to meet custom requirements or to fine-tune the thresh-
old for applications requiring higher precision.
• Available packages
—14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
• Pb-free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
Watchdog Transition
Detector
Watchdog
Timer Reset
WP
Protect Logic
RESET/RESET
X5323 = RESET
SI
Data
Register
Status
Register
SO
Command
Decode &
Control
Reset &
Watchdog
Timebase
X5325 = RESET
SCK
8Kbits
8Kbits
CS/WDI
Logic
VCC Threshold
Reset Logic
16Kbits
Power-on and
Low Voltage
Reset
V
+
-
CC
Generation
V
TRIP
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright Intersil Americas Inc. 2005. All Rights Reserved
1
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