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X5043S8Z-2.7 PDF预览

X5043S8Z-2.7

更新时间: 2024-11-17 22:22:31
品牌 Logo 应用领域
英特矽尔 - INTERSIL 光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
21页 402K
描述
CPU Supervisor with 4K SPI EEPROM

X5043S8Z-2.7 数据手册

 浏览型号X5043S8Z-2.7的Datasheet PDF文件第2页浏览型号X5043S8Z-2.7的Datasheet PDF文件第3页浏览型号X5043S8Z-2.7的Datasheet PDF文件第4页浏览型号X5043S8Z-2.7的Datasheet PDF文件第5页浏览型号X5043S8Z-2.7的Datasheet PDF文件第6页浏览型号X5043S8Z-2.7的Datasheet PDF文件第7页 
X5043, X5045  
®
4K, 512 x 8 Bit  
Data Sheet  
September 16, 2005  
FN8126.1  
CPU Supervisor with 4K SPI EEPROM  
Features  
• Low VCC Detection and Reset Assertion  
- Four standard reset threshold voltages  
4.63V, 4.38V, 2.93V, 2.63V  
- Re-program low VCC reset threshold voltage using  
special programming sequence.  
These devices combine four popular functions, Power-on  
Reset Control, Watchdog Timer, Supply Voltage Supervision,  
and Block Lock Protect Serial EEPROM Memory in one  
package. This combination lowers system cost, reduces  
board space requirements, and increases reliability.  
- Reset signal valid to VCC = 1V  
Applying power to the device activates the power-on reset  
circuit which holds RESET/RESET active for a period of  
time. This allows the power supply and oscillator to stabilize  
before the processor executes code.  
• Selectable Time Out Watchdog Timer  
• Long Battery Life with Low Power Consumption  
- <50µA max standby current, watchdog on  
- <10µA max standby current, watchdog off  
The Watchdog Timer provides an independent protection  
mechanism for microcontrollers. When the microcontroller  
fails to restart a timer within a selectable time out interval,  
the device activates the RESET/RESET signal. The user  
selects the interval from three preset values. Once selected,  
the interval does not change, even after cycling the power.  
• 4Kbits of EEPROM–1M Write Cycle Endurance  
• Save Critical Data with Block LockMemory  
- Protect 1/4, 1/2, all or none of EEPROM array  
• Built-in Inadvertent Write Protection  
- Write enable latch  
- Write protect pin  
The device’s low VCC detection circuitry protects the user’s  
system from low voltage conditions, resetting the system  
when VCC falls below the minimum VCC trip point.  
RESET/RESET is asserted until VCC returns to proper  
operating level and stabilizes. Four industry standard VTRIP  
thresholds are available, however, Intersil’s unique circuits  
allow the threshold to be reprogrammed to meet custom  
requirements or to fine-tune the threshold for applications  
requiring higher precision.  
• SPI Interface - 3.3MHz Clock Rate  
• Minimize Programming Time  
- 16-byte page write mode  
- 5ms write cycle time (typical)  
• Available Packages  
- 8 Ld MSOP, 8 Ld SOIC, 8 Ld PDIP  
- 14 Ld TSSOP  
The memory portion of the device is a CMOS Serial  
EEPROM array with Intersil’s block lock protection. The  
array is internally organized as 512 x 8. The device features  
a Serial Peripheral Interface (SPI) and software protocol  
allowing operation on a simple four-wire bus.  
• Pb-Free Plus Anneal Available (RoHS Compliant)  
Applications  
• Communications Equipment  
- Routers, Hubs, Switches  
- Set Top Boxes  
The device utilizes Intersil’s proprietary Direct Writecell,  
providing a minimum endurance of 100,000 cycles and a  
minimum data retention of 100 years.  
• Industrial Systems  
- Process Control  
- Intelligent Instrumentation  
• Computer Systems  
- Desktop Computers  
- Network Servers  
• Battery Powered Equipment  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  

X5043S8Z-2.7 替代型号

型号 品牌 替代类型 描述 数据表
X5043S8-2.7 INTERSIL

完全替代

CPU Supervisor with 4K SPI EEPROM

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