Datasheet > X4643S8Z-2.7A

X4643S8Z-2.7A

更新时间： 2024-01-11 14:08:54

品牌	Logo	应用领域
瑞萨 - RENESAS		可编程只读存储器电动程控只读存储器电可擦编程只读存储器双倍数据速率光电二极管内存集成电路
页数	文件大小	规格书
21页	329K
描述
X4643S8Z-2.7A

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X4643S8Z-2.7A 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	SOP, SOP8,.25	Reach Compliance Code：	unknown
风险等级：	5.84	I2C控制字节：	10100DDR
JESD-30 代码：	R-PDSO-G8	内存密度：	65536 bit
内存集成电路类型：	EEPROM	内存宽度：	8
端子数量：	8	字数：	8192 words
字数代码：	8000	最高工作温度：	70 °C
最低工作温度：		组织：	8KX8
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP8,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	并行/串行：	SERIAL
电源：	3/5 V	认证状态：	Not Qualified
串行总线类型：	I2C	最大待机电流：	0.000001 A
子类别：	EEPROMs	最大压摆率：	0.003 mA
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
写保护：	HARDWARE/SOFTWARE	Base Number Matches：	1

X4643S8Z-2.7A 数据手册

X4643, X4645

Figure 10. Writing 12 bytes to a 64-byte page starting at location 60.

8 Bytes

4 Bytes

Address Pointer

Ends Here

Addr = 8

Address

= 7

Address

n-1

The master terminates the Data Byte loading by issuing

a stop condition, which causes the device to begin the

nonvolatile write cycle. As with the byte write operation,

all inputs are disabled until completion of the internal

write cycle. See Figure 9 for the address, acknowledge,

and data transfer sequence.

Figure 11. Acknowledge Polling Sequence

Byte load completed

by issuing STOP.

Enter ACK Polling

Issue START

Stops and Write Modes

Stop conditions that terminate write operations must

be sent by the master after sending at least 1 full data

byte plus the subsequent ACK signal. If a stop is

issued in the middle of a data byte, or before 1 full

data byte plus its associated ACK is sent, then the

device will reset itself without performing the write. The

contents of the array will not be effected.

Issue Slave Address

Byte (Read or Write)

Issue STOP

ACK

returned?

Acknowledge Polling

YES

The disabling of the inputs during nonvolatile cycles

can be used to take advantage of the typical 5ms write

cycle time. Once the stop condition is issued to indi-

cate the end of the master’s byte load operation, the

device initiates the internal nonvolatile cycle. Acknowl-

edge polling can be initiated immediately. To do this,

the master issues a start condition followed by the

Slave Address Byte for a write or read operation. If the

device is still busy with the nonvolatile cycle then no

ACK will be returned. If the device has completed the

write operation, an ACK will be returned and the host

can then proceed with the read or write operation.

Refer to the flow chart in Figure 11.

Nonvolatile Cycle

complete. Continue

command sequence?

Issue STOP

YES

Continue Normal

Read or Write

Command Sequence

PROCEED

FN8123.0

March 29, 2005

1...7 8 91011 12 13...21

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X4643V8	XICOR	Power Supply Management Circuit, Adjustable, 1 Channel, CMOS, PDSO8, PLASTIC, TSSOP-8	获取价格
X4643V8-2.7	INTERSIL	CPU Supervidor with 64K EEPROM	获取价格
X4643V8-2.7A	INTERSIL	CPU Supervidor with 64K EEPROM	获取价格

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