32K
4K x 8 Bit
X4323/5
CPU Supervisor with 32K EEPROM
DESCRIPTION
FEATURES
• Selectable watchdog timer
The X4323/5 combines four popular functions, Power-
on Reset Control, Watchdog Timer, Supply Voltage
Supervision, and Serial EEPROM Memory in one pack-
age. This combination lowers system cost, reduces
board space requirements, and increases reliability.
• Low V
detection and reset assertion
CC
—Four standard reset threshold voltages
—Adjust low V reset threshold voltage using
CC
special programming sequence
—Reset signal valid to V = 1V
• Low power CMOS
—<20µA max standby current, watchdog on
—<1µA standby current, watchdog off
—3mA active current
CC
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
• 32Kbits of EEPROM
—64-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Block Lock (1, 2, 4, 8 pages, all, none)
• 400kHz 2-wire interface
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable time
out interval, the device activates the RESET/RESET
signal. The user selects the interval from three preset
values. Once selected, the interval does not change,
even after cycling the power.
The device’s low V
detection circuitry protects the
CC
• 2.7V to 5.5V power supply operation
• Available packages
—8-lead SOIC
user’s system from low voltage conditions, resetting the
system when V falls below the set minimum V trip
CC
CC
returns to
point. RESET/RESET is asserted until V
CC
—8-lead TSSOP
proper operating level and stabilizes. Four industry stan-
dard V thresholds are available, however, Xicor’s
TRIP
unique circuits allow the threshold to be reprogrammed
to meet custom requirements or to fine-tune the thresh-
old for applications requiring higher precision.
BLOCK DIAGRAM
Watchdog Transition
Detector
Watchdog
Timer Reset
WP
Protect Logic
RESET (X4323)
RESET (X4325)
Data
Register
SDA
Status
Register
EEPROM Array
Command
Reset &
Watchdog
Timebase
SCL
Decode &
Control
Logic
S0
S1
V
Threshold
CC
Reset logic
Power on and
+
-
Low Voltage
V
CC
Reset
Generation
V
TRIP
Characteristics subject to change without notice. 1 of 22
REV 1.20 2/11/04
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