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X4283S8I-2.7A-T1

更新时间： 2024-01-24 15:21:50
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管
页数 文件大小 规格书
22页 341K
描述
Power Supply Management Circuit, Adjustable, 1 Channel, CMOS, PDSO8

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X4283S8I-2.7A-T1 技术参数

是否Rohs认证：不符合生命周期：Obsolete
包装说明：0.150 INCH, SOIC-8Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.75Is Samacsys：N
其他特性：RESET THRESHOLD VOLTAGE IS 2.92V可调阈值：YES
模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUITJESD-30 代码：R-PDSO-G8
长度：4.9022 mm湿度敏感等级：1
信道数量：1功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE认证状态：Not Qualified
座面最大高度：1.7272 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
宽度：3.9116 mmBase Number Matches：1

X4283S8I-2.7A-T1 数据手册

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X4283, X4285  
®
128K, 16K x 8 Bit  
Data Sheet  
May 23, 2006  
FN8121.1  
DESCRIPTION  
CPU Supervisor with 128K EEPROM  
The X4283, X4285 combines four popular functions,  
Power-on Reset Control, Watchdog Timer, Supply  
Voltage Supervision, and Block Lock protect serial  
EEPROM memory in one package. This combination  
lowers system cost, reduces board space require-  
ments, and increases reliability.  
FEATURES  
• Selectable watchdog timer  
• Low V detection and reset assertion  
CC  
—Four standard reset threshold voltages  
—Adjust low V reset threshold voltage using  
CC  
special programming sequence  
Applying power to the device activates the power-on  
reset circuit which holds RESET/RESET active for a  
period of time. This allows the power supply and oscilla-  
tor to stabilize before the processor can execute code.  
—Reset signal valid to V = 1V  
CC  
• Low power CMOS  
—<20µA max standby current, watchdog on  
—<1µA standby current, watchdog OFF  
—3mA active current  
• 128Kbits of EEPROM  
—64 byte page write mode  
The Watchdog Timer provides an independent protec-  
tion mechanism for microcontrollers. When the micro-  
controller fails to restart a timer within a selectable  
time out interval, the device activates the  
RESET/RESET signal. The user selects the interval  
from three preset values. Once selected, the interval  
does not change, even after cycling the power.  
—Self-timed write cycle  
—5ms write cycle time (typical)  
• Built-in inadvertent write protection  
—Power-up/power-down protection circuitry  
—Protect 0, 1/4, 1/2, all or 64, 128, 256 or 512  
bytes of EEPROM array with programmable  
The device’s low V  
detection circuitry protects the  
CC  
user’s system from low voltage conditions, resetting  
the system when V falls below the set minimum V  
™
Block Lock protection  
CC  
CC  
• 400kHz 2-wire interface  
• 2.7V to 5.5V power supply operation  
• Available packages  
—8 Ld SOIC  
—8 Ld TSSOP  
trip point. RESET/RESET is asserted until V returns  
CC  
to proper operating level and stabilizes. Four industry  
standard Vtrip thresholds are available, however, Inter-  
sil’s unique circuits allow the threshold to be repro-  
grammed to meet custom requirements or to fine-tune  
the threshold for applications requiring higher precision.  
• Pb-free plus anneal available (RoHS compliant)  
BLOCK DIAGRAM  
Watchdog Transition  
Detector  
Watchdog  
Timer Reset  
WP  
Protect Logic  
RESET (X4283)  
RESET (X4285)  
Data  
Register  
SDA  
Status  
Register  
EEPROM Array  
Command  
Reset &  
Watchdog  
Timebase  
SCL  
Decode &  
Control  
Logic  
S0  
S1  
VCC Threshold  
Reset logic  
Power-on and  
Low Voltage  
+
-
VCC  
Reset  
Kb=Kilobyte  
Generation  
VTRIP  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved  
1
All other trademarks mentioned are the property of their respective owners.  
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