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X4165S8

更新时间： 2024-02-06 14:40:39
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管
页数 文件大小 规格书
22页 924K
描述
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, PLASTIC, SOIC-8

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X4165S8 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：ROHS COMPLIANT, SOIC-8针数：8
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.69
其他特性：RESET THRESHOLD VOLTAGE IS 4.38V可调阈值：NO
模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUITJESD-30 代码：R-PDSO-G8
JESD-609代码：e3长度：4.9022 mm
信道数量：1功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.7272 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：MATTE TIN端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3.9116 mm
Base Number Matches：1

X4165S8 数据手册

 浏览型号X4165S8的Datasheet PDF文件第4页浏览型号X4165S8的Datasheet PDF文件第5页浏览型号X4165S8的Datasheet PDF文件第6页浏览型号X4165S8的Datasheet PDF文件第8页浏览型号X4165S8的Datasheet PDF文件第9页浏览型号X4165S8的Datasheet PDF文件第10页 
X4163, X4165  
Figure 4. V  
Programming Sequence  
TRIP  
VTRIP Programming  
Execute  
Reset VTRIP  
Sequence  
Set VCC = VCC Applied =  
Desired VTRIP  
New VCC Applied =  
Old VCC Applied + Error  
New VCC Applied =  
Old VCC Applied - Error  
Execute  
Set VTRIP  
Sequence  
Execute  
Reset VTRIP  
Sequence  
Apply 5V to VCC  
Decrement VCC  
(VCC = VCC - 50mV)  
NO  
RESET pin  
goes active?  
YES  
Error –Emax  
Error Emax  
Measured VTRIP  
Desired VTRIP  
-
–Emax < Error < Emax  
DONE  
Emax = Maximum Allowed VTRIP Error  
Control Register  
The user must issue a stop after sending this byte to the  
register to initiate the nonvolatile cycle that stores WD1,  
and WD0. The X4163, X4165 will not acknowledge any  
data bytes written after the first byte is entered.  
The Control Register provides the user a mechanism for  
changing the Block Lock and Watchdog Timer settings.  
The Block Lock and Watchdog Timer bits are nonvolatile  
and do not change when power is removed.  
The state of the Control Register can be read at any time  
by performing a random read at address FFFFh. Only  
one byte is read by each register read operation. The  
X4163, X4165 resets itself after the first byte is read.  
The master should supply a stop condition to be consis-  
tent with the bus protocol, but a stop is not required to  
end this operation.  
The Control Register is accessed at address FFFFh. It  
can only be modified by performing a byte write opera-  
tion directly to the address of the register and only one  
data byte is allowed for each register write operation.  
Prior to writing to the Control Register, the WEL and  
RWEL bits must be set using a two step process, with  
the whole sequence requiring 3 steps. See "Writing to  
the Control Register" below.  
7
6
5
4
3
2
1
0
WPEN WD1 WD0 BP1 BP0 RWEL WEL BP2  
FN8120 Rev 2.00  
November 26, 2007  
Page 7 of 22  
1...45678910...22

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