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X4165V8-2.7 PDF预览

X4165V8-2.7

更新时间： 2024-11-19 20:33:23
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管
页数 文件大小 规格书
22页 924K
描述
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, PLASTIC, MO-153AC, TSSOP-8

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X4165V8-2.7 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：PLASTIC, MO-153AC, TSSOP-8
针数：8Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.77其他特性：RESET THRESHOLD VOLTAGE IS 2.62V
可调阈值：NO模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码：R-PDSO-G8JESD-609代码：e0
长度：4.4 mm湿度敏感等级：1
信道数量：1功能数量：1
端子数量：8最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：240
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：3 mm
Base Number Matches：1

X4165V8-2.7 数据手册

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DATASHEET  
X4163, X4165  
16K, 2K x 8 Bit CPU Supervisor with 16K EEPROM  
FN8120  
Rev 2.00  
November 26, 2007  
FEATURES  
DESCRIPTION  
• Selectable watchdog timer  
The X4163, X4165 combines four popular functions,  
Power-on Reset Control, Watchdog Timer, Supply Volt-  
age Supervision, and Serial EEPROM Memory in one  
package. This combination lowers system cost,  
reduces board space requirements, and increases reli-  
ability.  
• Low V detection and reset assertion  
CC  
—Four standard reset threshold voltages  
—Adjust low V reset threshold voltage using  
CC  
special programming sequence  
—Reset signal valid to V = 1V  
CC  
• Low power CMOS  
Applying power to the device activates the power on  
reset circuit which holds RESET/RESET active for a  
period of time. This allows the power supply and oscilla-  
tor to stabilize before the processor can execute code.  
—<20µA max standby current, watchdog on  
—<1µA standby current, watchdog OFF  
—3mA active current  
• 16Kbits of EEPROM  
—64-byte page write mode  
—Self-timed write cycle  
The Watchdog Timer provides an independent protec-  
tion mechanism for microcontrollers. When the micro-  
controller fails to restart a timer within a selectable  
time out interval, the device activates the  
RESET/RESET signal. The user selects the interval  
from three preset values. Once selected, the interval  
does not change, even after cycling the power.  
—5ms write cycle time (typical)  
• Built-in inadvertent write protection  
—Power-up/power-down protection circuitry  
—Block Lock (1, 2, 4, 8 pages, all, none)  
• 400kHz 2-wire interface  
• 2.7V to 5.5V power supply operation  
• Available Packages  
—8 Ld SOIC  
The device’s low V  
detection circuitry protects the  
CC  
user’s system from low voltage conditions, resetting the  
system when V falls below the set minimum V trip  
CC  
CC  
—8 Ld TSSOP  
• Pb-free plus anneal available (RoHS compliant)  
point. RESET/RESET is asserted until V  
returns to  
CC  
proper operating level and stabilizes. Four industry  
standard V thresholds are available, however, Inter-  
TRIP  
sil’s unique circuits allow the threshold to be repro-  
grammed to meet custom requirements or to fine-tune  
the threshold for applications requiring higher precision.  
BLOCK DIAGRAM  
Watchdog Transition  
Detector  
Watchdog  
Timer Reset  
WP  
Protect Logic  
RESET (X4163)  
RESET (X4165)  
Data  
Register  
SDA  
Status  
Register  
EEPROM Array  
Command  
Reset &  
Watchdog  
Timebase  
SCL  
Decode &  
Control  
Logic  
S0  
S1  
VCC Threshold  
Reset logic  
Power on and  
Low Voltage  
Reset  
VCC  
+
-
VTRIP  
Generation  
FN8120 Rev 2.00  
November 26, 2007  
Page 1 of 22  
1234567...22

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