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X24645I

更新时间: 2024-02-24 23:30:21
品牌 Logo 应用领域
ICMIC 可编程只读存储器
页数 文件大小 规格书
18页 317K
描述
Advanced 2-Wire Serial E2PROM with Block LockTM Protection

X24645I 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP,
针数:20Reach Compliance Code:unknown
ECCN代码:3A001.A.2.CHTS代码:8542.32.00.51
风险等级:5.82Is Samacsys:N
最大时钟频率 (fCLK):0.1 MHzJESD-30 代码:R-PDSO-G20
长度:6.5 mm内存密度:65536 bit
内存集成电路类型:EEPROM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:20字数:8192 words
字数代码:8000工作模式:SYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:8KX8封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:1.2 mm串行总线类型:I2C
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mm最长写入周期时间 (tWC):10 ms
Base Number Matches:1

X24645I 数据手册

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TM  
This X24645 device has been acquired by  
IC MICROSYSTEMS from Xicor, Inc.  
ICmic  
8192 x 8 Bit  
IC MICROSYSTEMS  
64K  
X24645  
2
Advanced 2-Wire Serial E PROM with Block LockTM Protection  
FEATURES  
DESCRIPTION  
The X24645 is a CMOS 65,536-bit serial E2PROM,  
internally organized 8192 x 8. The X24645 features a  
2.7V to 5.5V Power Supply  
Low Power CMOS  
—Active Read Current Less Than 1mA  
—Active Write Current Less Than 3mA  
serial interface and software protocol allowing operation  
on a simple two wire bus.  
—Standby Current Less Than 1A  
Internally Organized 8192 x 8  
New Programmable Block Lock Protection  
—Software Write Protection  
—Programmable hardware Write Protect  
Two device select inputs (S1, S2) allow up to four  
devices to share a common two wire bus.  
A Write Protect Register at the highest address location,  
1FFFh, provides three new write protection  
2
Block Lock (0, 1/4, 1/2, or all of the E PROM  
array)  
features: Software Write Protect, Block Write Protect, and  
Hardware Write Protect. The Software Write  
2 Wire Serial Interface  
Protect feature prevents any nonvolatile writes to the  
X24645 until the WEL bit in the write protect register is  
Bidirectional Data Transfer Protocol  
32 Byte Page Write Mode  
—Minimizes Total Write Time Per Byte  
Self Timed Write Cycle  
—Typical Write Cycle Time of 5ms  
High Reliability  
—Endurance: 100,000 Cycles  
—Data Retention: 100 Years  
Available Packages  
set. The Block Write Protection feature allows the user to  
individually write protect four blocks of the array by  
programming two bits in the write protect register. The  
Programmable Hardware Write Protect feature allows  
the user to install the X24645 with WP tied to VCC,  
program the entire memory array in place, and then  
enable the hardware write protection by programming a  
WPEN bit in the write protect register. After this,  
—8-Lead PDIP  
selected blocks of the array, including the write protect  
register itself, are permanently write protected, as long  
as WP remains HIGH.  
—8-Lead SOIC (JEDEC)  
—14-Lead SOIC (JEDEC)  
—20-Lead TSSOP  
FUNCTIONAL DIAGRAM  
WP  
H.V. GENERATION  
START CYCLE  
TIMING &  
CONTROL  
V
CC  
V
SS  
WRITE PROTECT  
REGISTER AND  
SDA  
START  
STOP  
LOGIC  
LOGIC  
CONTROL  
LOGIC  
SLAVE ADDRESS  
REGISTER  
2
E PROM  
XDEC  
256 X 256  
LOAD  
WORD  
INC  
SCL  
+COMPARATOR  
ADDRESS  
COUNTER  
S
S
2
1
R/W  
YDEC  
8
CK  
D
OUT  
PIN  
DATA REGISTER  
D
OUT  
ACK  
2783 ILL F01  
Xicor, 1995, 1996 Patents Pending  
Characteristics subject to change without notice  
2783-3.5 5/13/96 T1/C0/D0 NS  
1

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