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WT7510

更新时间: 2024-01-13 07:32:15
品牌 Logo 应用领域
其他 - ETC 锁存器
页数 文件大小 规格书
1页 62K
描述
protection circuits, power good output (PGO), fault protection latch (FPL_N) CONTROL

WT7510 数据手册

  
WT7510  
GENERAL DESCRIPTION  
The WT7510 provides protection circuits, power good output (PGO), fault protection latch (FPL_N),  
and a protection detector function (PDON_N) control. It can minimize external components of switching  
power supply systems in personal computer.  
The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. The Under Voltage  
Detector (UVD) monitors 3.3V, 5V input voltage level. When OVD or UVD detect the fault voltage level,  
the FPL_N is latched HIGH and PGO go low. The latch can be reset by PDON_N goo HIGH. There is 2.4  
ms delay time for PDON_N turn off FPL_N.  
When OVD and UVD detect the right voltage level, the power good output (PGO) will be issue.  
FEATURES  
The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level.  
The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level.  
Both of the power good output (PGO) and fault protection latch (FPL_N) are Open Drain Output.  
75 ms time delay for UVD.  
300 ms time delay for PGO.  
38 ms for PDON_N input signal De–bounce.  
73 us for internal signal De–glitches.  
2.4 ms time delay for PDON_N turn-off FPL_N.  
PIN ASSIGNMENT AND PACKAGE TYPE  
1
2
3
4
8
7
6
5
PGI  
PGO  
VCC  
V5  
Package type  
8–Pin Plastic DIP  
8–Pin Plastic SOIC WT7510–S080WT–12  
ORDERING INFORMATION  
WT7510–N080WT–12  
GND  
FPL_N  
PDON_N  
V33  
PIN DESCRIPTION  
Pin No. Pin Name TYPE  
Description  
1
2
3
4
5
6
7
8
PGI  
I
P
O
I
I
I
power good input pin  
Ground  
fault protection latch output pin(open drain output)  
protection detector function ON/OFF control input pin  
3.3V input pin  
5V input pin  
Supply voltage / 12V input pin  
GND  
FPL_N  
PDON_N  
V33  
V5  
VCC  
I
O
PGO  
power good output pin(open drain output)  

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