WMS512K8V-XXX
HI-RELIABILITY PRODUCT
512Kx8 MONOLITHIC SRAM PRELIMINARY*
FEATURES
■ Access Times 15, 17, 20ns
■ Low Power CMOS
■ Revolutionary, Center Power/Ground Pinout
■ Low Voltage Operation:
• 3.3V ± 10% Power Supply
JEDEC Approved
• 36 lead Ceramic SOJ (Package 100)
• 36 lead Ceramic Flat Pack (Package 226)
■ Commercial, Industrial and Military Temperature Range
■ TTL Compatible Inputs and Outputs
■ Fully Static Operation:
■ Evolutionary, Corner Power/Ground Pinout
JEDEC Approved
• 32 pin Ceramic DIP (Package 300)
• No clock or refresh required.
• 32 lead Ceramic SOJ (Package 101)**
• 32 lead Ceramic Flat Pack (Package 220)**
■ Three State Output.
*
This data sheet describes a product that is not fully qualified or
characterized and is subject to change without notice.
■ 32 pin, Rectangular Ceramic Leadless Chip Carrier
(Package 601)
** Package under developement.
REVOLUTIONARY PINOUT
EVOLUTIONARY PINOUT
32 DIP
36 FLAT PACK
36 CSOJ
32 CSOJ (DE)**
32 FLAT PACK (FE)**
32 CLCC
TOP VIEW
TOP VIEW
TOP VIEW
A0
A1
1
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A16
A14
A12
A7
1
32
VCC
2
A18
A17
A16
A15
OE
2
31 A15
30 A17
29 WE
28 A13
27 A8
4
3 2 1 32 31 30
A2
3
3
5
29
28
27
26
25
24
23
22
21
A7
A6
A5
A4
A3
A2
A1
A0
A3
4
WE
A13
A8
4
A4
5
6
5
CS
I/O0
I/O1
6
7
A6
6
7
I/O7
I/O6
GND
A5
7
26 A9
8
A9
8
A4
8
25 A11
24 OE
23 A10
22 CS
21 I/O7
20 I/O6
19 I/O5
18 I/O4
17 I/O3
9
A11
OE
A10
CS
VCC
9
A3
9
10
11
12
13
GND
I/O2
I/O3
WE
A5
10
11
12
13
14
15
16
17
18
VCC
A2
10
11
12
13
14
15
16
I/O5
I/O4
A14
A13
A12
A11
A10
NC
A1
A0
I/O
0
I/O7
I/O0
I/O1
I/O2
GND
14 15 16 17 18 19 20
A6
A7
A8
A9
PIN DESCRIPTION
A0-18
I/O0-7
CS
Address Inputs
Data Input/Output
Chip Select
OE
Output Enable
Write Enable
Power Supply
Ground
WE
VCC
GND
1
April 2001 Rev. 6
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com