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WM8150 PDF预览

WM8150

更新时间: 2024-01-14 03:14:55
品牌 Logo 应用领域
欧胜 - WOLFSON 输出元件
页数 文件大小 规格书
24页 271K
描述
SINGLE CHANNEL 12 BIT CIS/CCD AFE WITH 4 BIT WIDE OUTPUT

WM8150 数据手册

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WM8150  
Single Channel 12-bit CIS/CCD AFE with 4-bit Wide Output  
DESCRIPTION  
FEATURES  
12-bit ADC  
The WM8150 is a 12-bit analogue front end/digitiser IC  
which processes and digitises the analogue output signals  
from CCD sensors or Contact Image Sensors (CIS) at pixel  
sample rates of up to 8MSPS.  
8MSPS conversion rate  
Low power - 170mW typical  
5V single supply or 5V/3.3V dual supply operation  
Single channel operation  
The device includes a complete analogue signal processing  
channel containing Reset Level Clamping, Correlated  
Double Sampling, Programmable Gain and Offset adjust  
functions. Internal multiplexers allow fast switching of offset  
and gain for line-by-line colour processing. The output from  
this channel is time multiplexed into a high-speed 12-bit  
Analogue to Digital Converter. The digital output data is  
available in 4-bit wide multiplexed format.  
Correlated double sampling  
Programmable gain (8-bit resolution)  
Programmable offset adjust (8-bit resolution)  
Programmable clamp voltage  
4-bit wide multiplexed data output format  
Internally generated voltage references  
20-pin SSOP package  
An internal 4-bit DAC is supplied for internal reference level  
generation. This may be used during CDS to reference CIS  
signals or during Reset Level Clamping to clamp CCD  
signals. An external reference level may also be supplied.  
ADC references are generated internally, ensuring optimum  
performance from the device.  
Serial control interface  
APPLICATIONS  
Flatbed and sheetfeed scanners  
USB compatible scanners  
Using an analogue supply voltage of 5V, a digital core  
voltage of 5V, and a digital interface supply of either 5V or  
3.3V, the WM8150 typically only consumes 160mW when  
operating from a single 5V supply.  
Multi-function peripherals  
High-performance CCD sensor interface  
BLOCK DIAGRAM  
AVDD DVDD1 DVDD2  
VRT VRX VRB  
VSMP MCLK  
VREF/BIAS  
CL  
RS VS  
TIMING CONTROL  
R
8
M
U
X
OFFSET  
DAC  
G
B
OP[0]  
OP[1]  
OP[2]  
OP[3]/SDO  
12-  
BIT  
ADC  
DATA  
I/O  
PORT  
VINP  
RLC  
CDS  
PGA  
+
+
I/P SIGNAL  
POLARITY  
ADJUST  
8
VRLC/VBIAS  
R
G
B
M
U
X
W
WM8150  
CONFIGURABLE  
SERIAL  
CONTROL  
SEN  
SCK  
SDI  
4
RLC  
DAC  
INTERFACE  
AGND2  
DGND  
AGND1  
WOLFSON MICROELECTRONICS plc  
Production Data, November 2002, Rev 3.0  
Copyright 2002 Wolfson Microelectronics plc  
w :: www.wolfsonmicro.com  

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