Datasheet > WLCSP16

WLCSP16

更新时间： 2022-12-16 10:43:29

品牌	Logo	应用领域
恩智浦 - NXP		闪存微控制器静态存储器
页数	文件大小	规格书
38页	250K
描述
32-bit ARM Cortex-M0 microcontroller; 32 kB flash and 8 kB SRAM

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WLCSP16 数据手册

LPC1102

NXP Semiconductors

32-bit ARM Cortex-M0 microcontroller

Table 3.

Symbol

LPC1102 pin description table …continued

Type Reset Wake-up Description

state^[1]function

[2]

R/PIO1_0/

B3^[5]

I; PU

R — Reserved.

AD1/CT32B1_CAP0

I/O

PIO1_0 — General purpose digital input/output pin.

AD1 — A/D converter, input 1.

CT32B1_CAP0 — Capture input 0 for 32-bit timer 1.

R — Reserved.

R/PIO1_1/

C4^[5]

I; PU

AD2/CT32B1_MAT0

I/O

PIO1_1 — General purpose digital input/output pin.

AD2 — A/D converter, input 2.

CT32B1_MAT0 — Match output 0 for 32-bit timer 1.

R — Reserved.

R/PIO1_2/

C3^[5]

I; PU

AD3/CT32B1_MAT1

I/O

PIO1_2 — General purpose digital input/output pin.

AD3 — A/D converter, input 3.

I/O

CT32B1_MAT1 — Match output 1 for 32-bit timer 1.

SWDIO — Serial wire debug input/output.

PIO1_3 — General purpose digital input/output pin.

AD4 — A/D converter, input 4.

SWDIO/PIO1_3/AD4/ D4^[5]

CT32B1_MAT2

I; PU

I/O

CT32B1_MAT2 — Match output 2 for 32-bit timer 1.

PIO1_6 — General purpose digital input/output pin.

RXD — Receiver input for UART.

PIO1_6/RXD/

CT32B0_MAT0

C2^[4]

D1^[4]

I; PU

I/O

CT32B0_MAT0 — Match output 0 for 32-bit timer 0.

PIO1_7 — General purpose digital input/output pin.

TXD — Transmitter output for UART.

PIO1_7/TXD/

CT32B0_MAT1

I; PU

CT32B0_MAT1 — Match output 1 for 32-bit timer 0.

V_DD

D2; A1

B2^[6]

3.3 V supply voltage to the internal regulator, the external rail,

and the ADC. Also used as the ADC reference voltage.

XTALIN

V_SS

External clock input and input to internal clock generator

circuits. Input voltage must not exceed 1.8 V.

D3; B1

Ground.

[1] Pin state at reset for default function: I = Input; PU = internal pull-up enabled.

[2] Wake-up functionality: DS = Deep-sleep mode wake-up pin (to be configured in the start logic).

[3] See Figure 20 for the reset pad configuration.

[4] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 19).

[5] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.

When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 19).

[6] When the external clock is not used, connect XTALIN as follows: XTALIN can be left floating or can be grounded (grounding is preferred

to reduce susceptibility to noise).

LPC1102

All information provided in this document is subject to legal disclaimers.

Objective data sheet

Rev. 00 — 23 June 2010

5 of 38

1 2 3 456 7 8...38

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