Datasheet > WEDPN8M64V-100BC

WEDPN8M64V-100BC

更新时间： 2024-10-03 10:02:03

品牌	Logo	应用领域
WEDC		时钟动态存储器内存集成电路
页数	文件大小	规格书
13页	262K
描述
Synchronous DRAM Module, 8MX64, 7ns, CMOS, PBGA219, 25 X 25 MM, PLASTIC, BGA-219

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WEDPN8M64V-100BC 数据手册

WEDPN8M64V-XBX

White Electronic Designs

8Mx64 Synchronous DRAM*

GENERAL DESCRIPTION

FEATURES

ꢀ

High Frequency = 100, 125, 133**MHz

Package:

The 64MByte (512Mb) SDRAM is a high-speed CMOS,

dynamic random-access memory using 4 chips containing

134,217,728 bits. Each chip is internally conﬁgured as a

quad-bank DRAM with a synchronous interface. Each of

the chip’s 33,554,432-bit banks is organized as 4,096 rows

by 512 columns by 16 bits.

• 219 Plastic Ball Grid Array (PBGA), 25 x 25mm

Single 3.3V 0.3V power supply

Unbuffered

Fully synchronous; all signals registered on positive

edge of system clock cycle

ꢀ

Read and write accesses to the SDRAM are burst oriented;

accesses start at a selected location and continue for

a programmed number of locations in a programmed

sequence. Accesses begin with the registration of an

ACTIVE command, which is then followed by a READ or

WRITE command. The address bits registered coincident

with theACTIVE command are used to select the bank and

row to be accessed (BA₀, BA₁select the bank;A_0-11select

the row). The address bits registered coincident with the

READ or WRITE command are used to select the starting

column location for the burst access.

The SDRAM provides for programmable READ or WRITE

burst lengths of 1, 2, 4 or 8 locations, or the full page, with

a burst terminate option.AnAUTO PRECHARGE function

may be enabled to provide a self-timed row precharge that

is initiated at the end of the burst sequence.

The 512Mb SDRAM uses an internal pipelined architecture

to achieve high-speed operation. This architecture is

compatible with the 2n rule of prefetch architectures, but

it also allows the column address to be changed on every

clock cycle to achieve a high-speed, fully random access.

Precharging one bank while accessing one of the other

three banks will hide the precharge cycles and provide

seamless, high-speed, random-access operation.

ꢀ

Internal pipelined operation; column address can be

changed every clock cycle

ꢀ

Internal banks for hiding row access/precharge

Programmable Burst length 1,2,4,8 or full page

4,096 refresh cycles

Commercial, Industrial and Military Temperature

Ranges

ꢀ

Organized as 8M x 64

• User Conﬁgurable as 2 x 8M x 32 or 4 x 8M x 16

Weight: WEDPN8M64V-XBX - 2.5 grams typical

BENEFITS

ꢀ

41% SPACE SAVINGS

Reduced part count

Low Proﬁle: 2.20 mm (0.087) Max

Reduced trace lengths for lower parasitic

capacitance

ꢀ

Laminate interposer for optimum TCE match

Suitable for hi-reliability applications

Upgradeable to 16M x 64 density

(WEDPN16M64V-XB2X)

The 512Mb SDRAM is designed to operate in 3.3V, low-

power memory systems.An auto refresh mode is provided,

along with a power-saving, power-down mode.

* This product is Not Recommended for New Designs, refer to WEDPN8M64V-XB2X for

new designs.

** 133MHz available at commercial (0^oC to + 70^oC) temperature only.

Discrete Approach

ACTUAL SIZE

11.9

22.3

WEDPN8M64V-XBX

Area

4 x 265mm = 1061mm

625mm

41%

April 2004

Rev. 14

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

12 3 4 5 6 7...13

中文翻译

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与WEDPN8M64V-100BC相关器件

型号	品牌	获取价格	描述	数据表
WEDPN8M64V-100BM	WEDC	获取价格	Synchronous DRAM Module, 8MX64, 7ns, CMOS, PBGA219, 25 X 25 MM, PLASTIC, BGA-219
WEDPN8M64V-125B2C	WEDC	获取价格	8Mx64 Synchronous DRAM
WEDPN8M64V-125B2I	WEDC	获取价格	8Mx64 Synchronous DRAM
WEDPN8M64V-125B2M	WEDC	获取价格	8Mx64 Synchronous DRAM
WEDPN8M64V-125BC	WEDC	获取价格	Synchronous DRAM Module, 8MX64, 6ns, CMOS, PBGA219, 25 X 25 MM, PLASTIC, BGA-219
WEDPN8M64V-125BI	WEDC	获取价格	Synchronous DRAM Module, 8MX64, 6ns, CMOS, PBGA219, 25 X 25 MM, PLASTIC, BGA-219
WEDPN8M64V-133B2C	WEDC	获取价格	8Mx64 Synchronous DRAM
WEDPN8M64V-133B2I	WEDC	获取价格	8Mx64 Synchronous DRAM
WEDPN8M64V-133B2M	WEDC	获取价格	8Mx64 Synchronous DRAM
WEDPN8M64V-133BC	WEDC	获取价格	Synchronous DRAM Module, 8MX64, 5.5ns, CMOS, PBGA219, 25 X 25 MM, PLASTIC, BGA-219

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