Datasheet > WEDPN8M72V-125BI

WEDPN8M72V-125BI

更新时间： 2024-10-01 23:42:03

品牌	Logo	应用领域
其他 - ETC		内存集成电路动态存储器时钟
页数	文件大小	规格书
12页	199K
描述
x72 SDRAM Module

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WEDPN8M72V-125BI 数据手册

WEDPN8M72V-XBX

HI-RELIABILITY PRODUCT

8Mx72 Synchronous DRAM

FEATURES

GENERAL DESCRIPTION

■ High Frequency = 100, 125MHz

The 64MByte (512Mb) SDRAM is a high-speed CMOS, dynamic

random-access ,memory using 5 chips containing 134,217,728

bits. Each chip is internally configured as a quad-bank DRAM with

a synchronous interface. Each of the chip’s 33,554,432-bit banks

is organized as 4,096 rows by 512 columns by 16 bits.

■ Package:

• 219 Plastic Ball Grid Array (PBGA), 32 x 25mm

■ Single 3.3V ±0.3V power supply

■ Fully Synchronous; all signals registered on positive edge of

Read and write accesses to the SDRAM are burst oriented;

accesses start at a selected location and continue for a pro-

grammed number of locations in a programmed sequence. Ac-

cesses begin with the registration of an ACTIVE command, which

is then followed by a READ or WRITE command. The address bits

registered coincident with the ACTIVE command are used to

select the bank and row to be accessed (BA0, BA1 select the bank;

A0-11 select the row). The address bits registered coincident with

the READ or WRITE command are used to select the starting

column location for the burst access.

system clock cycle

■ Internal pipelined operation; column address can be changed

every clock cycle

■ Internal banks for hiding row access/precharge

■ Programmable Burst length 1,2,4,8 or full page

■ 4096 refresh cycles

■ Commercial, Industrial and Military Temperature Ranges

■ Organized as 8M x 72

TheSDRAMprovidesforprogrammableREADorWRITEburstlengths

of 1, 2, 4 or 8 locations, or the full page, with a burst terminate option.

An AUTO PRECHARGE function may be enabled to provide a self-

timed row precharge that is initiated at the end of the burst sequence.

■ Weight: WEDPN8M72V-XBX - 2.5 grams typical

The512MbSDRAMusesaninternalpipelinedarchitecturetoachieve

high-speed operation. This architecture is compatible with the 2nrule

of prefetch architectures, but it also allows the column address to be

changed on every clock cycle to achieve a high-speed, fully random

access. Precharging one bank while accessing one of the other three

banks will hide the precharge cycles and provide seamless, high-

speed, random-access operation.

BENEFITS

■ 40% SPACE SAVINGS

■ Reduced part count

■ Reduced I/O count

• 19% I/O Reduction

■ Lower inductance and capacitance for low noise performance

■ Suitable for hi-reliability applications

■ Upgradeable to 16M x 72 density (contact factory for information)

The 512Mb SDRAM is designed to operate in 3.3V, low-power

memory systems. An auto refresh mode is provided, along with a

power-saving, power-down mode.

All inputs and outputs are LVTTL compatible. SDRAMs offer substan-

tialadvancesinDRAMoperatingperformance, includingtheabilityto

synchronously burst data at a high data rate with automatic column-

address generation, the ability to interleave between internal banks

in order to hide precharge time and the capability to randomly change

column addresses on each clock cycle during a burst access.

This product subject to change without notice.

Discrete Approach

ACTUAL SIZE

11.9

22.3

Area

5 x 265mm²= 1328mm²

5 x 54 pins = 270 pins

800mm²

40%

19%

I/O

219 Balls

Count

White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

April 2001 Rev. 7

12 3 4 5 6 7...12

中文翻译

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与WEDPN8M72V-125BI相关器件

型号	品牌	获取价格	描述	数据表
WEDPN8M72V-125BM	ETC	获取价格	x72 SDRAM Module
WEDPN8M72V-133B2C	WEDC	获取价格	8Mx72 Synchronous DRAM
WEDPN8M72V-133B2I	MICROSEMI	获取价格	Synchronous DRAM, 8MX72, 5.5ns, CMOS, PBGA219, 21 X 25 MM, PLASTIC, BGA-219
WEDPN8M72V-133B2I	WEDC	获取价格	8Mx72 Synchronous DRAM
WEDPN8M72V-133B2M	WEDC	获取价格	8Mx72 Synchronous DRAM
WEDPN8M72V-133BC	MICROSEMI	获取价格	Synchronous DRAM Module, 8MX72, 5.4ns, CMOS, DIMM-270
WEDPN8M72VR-66C	MICROSEMI	获取价格	Synchronous DRAM Module, 8MX72, 7.5ns, CMOS, PBGA219, 32 X 25 MM, PLASTIC, BGA-219
WEDPN8M72VR-66I	MICROSEMI	获取价格	Synchronous DRAM Module, 8MX72, 7.5ns, CMOS, PBGA219, 32 X 25 MM, PLASTIC, BGA-219
WEDPN8M72VR-66M	MICROSEMI	获取价格	Synchronous DRAM Module, 8MX72, 7.5ns, CMOS, PBGA219, 32 X 25 MM, PLASTIC, BGA-219
WEDPN8M72VR-XBX	ETC	获取价格	Registered SDRAM MCP

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