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WED3EG6417S262D4 PDF预览

WED3EG6417S262D4

更新时间: 2024-09-30 03:54:59
品牌 Logo 应用领域
WEDC 存储内存集成电路动态存储器双倍数据速率
页数 文件大小 规格书
7页 453K
描述
128MB - 16Mx64 DDR SDRAM UNBUFFERED

WED3EG6417S262D4 数据手册

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WED3EG6417S-D4  
White Electronic Designs  
*ADVANCED  
128MB - 16Mx64 DDR SDRAM UNBUFFERED  
FEATURES  
DESCRIPTION  
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Double-data-rate architecture  
The WED3DG6417S is a 16Mx64 Double Data Rate  
SDRAMmemorymodulebasedon128MbDDRSDRAM  
component. The module consists of eight 16Mx8 DDR  
SDRAMs in 66 pin TSOP package mounted on a 200  
pin FR4 Substrate.  
Bi-directional data strobes (DQS)  
Differential clock inputs (CK & CK#)  
Programmable Read Latency 2,2.5 (clock)  
Programmable Burst Length (2,4,8)  
Programmable Burst type (sequential & interleave)  
Synchronous design allows precise cycle control with  
the use of system clock. Data I/O transactions are  
possible on both edges and Burst Lenths allow the same  
device to be useful for a variety of high bandwidth, high  
performance memory system applications.  
Edge aligned data output, center aligned data  
input  
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Auto and self refresh  
Serial presence detect  
JEDEC standard 200 pin SO-DIMM package  
Power supply: 2.5V ± 0.25V  
* This datasheet describes a product that may or may not be under development  
and is subject to change or cancellation without notice.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
March 2002  
Rev. # 0  
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  

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