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WED3EG6433SL265D3 PDF预览

WED3EG6433SL265D3

更新时间: 2024-09-30 15:57:59
品牌 Logo 应用领域
WEDC 动态存储器双倍数据速率内存集成电路
页数 文件大小 规格书
6页 412K
描述
DDR DRAM Module, 32MX64, CMOS, DIMM-184

WED3EG6433SL265D3 数据手册

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WED3EG6433S-D3  
White Electronic Designs  
*ADVANCED  
256MB- 32Mx64 DDR SDRAM UNBUFFERED  
FEATURES  
DESCRIPTION  
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Double-data-rate architecture  
The WED3DG6433S is a 32Mx64 Double Data Rate  
SDRAM memory module based on 128Mb DDR SDRAM  
component. The module consists of sixteen 16Mx8 DDR  
SDRAMs in 66 pin TSOP package mounted on a 184 Pin  
FR4 substrate.  
Bi-directional data strobes (DQS)  
Differential clock inputs (CK & CK#)  
Programmable Read Latency 2,2.5 (clock)  
Programmable Burst Length (2,4,8)  
Programmable Burst type (sequential & interleave)  
Edge aligned data output, center aligned data input  
Auto and self refresh  
Synchronous design allows precise cycle control with the  
use of system clock. Data I/O transactions are possible on  
both edges and Burst Lenths allow the same device to be  
useful for a variety of high bandwidth, high performance  
memory system applications.  
Serial presence detect  
JEDEC standard 184 pin DIMM package  
Power Supply: 2.5V ± 0.25V  
*
This datasheet describes a product that may or may not be under development and  
is subject to change or cancelled without notice.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
Sept 2002  
Rev. A  
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  

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