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W78I051DDG PDF预览

W78I051DDG

更新时间: 2024-11-21 02:47:31
品牌 Logo 应用领域
新唐 - NUVOTON /
页数 文件大小 规格书
89页 1487K
描述
8-BIT MICROCONTROLLER

W78I051DDG 数据手册

 浏览型号W78I051DDG的Datasheet PDF文件第2页浏览型号W78I051DDG的Datasheet PDF文件第3页浏览型号W78I051DDG的Datasheet PDF文件第4页浏览型号W78I051DDG的Datasheet PDF文件第5页浏览型号W78I051DDG的Datasheet PDF文件第6页浏览型号W78I051DDG的Datasheet PDF文件第7页 
W78I054D/W78I052D/W78I051D Data Sheet  
8-BIT MICROCONTROLLER  
Table of Contents-  
1
2
3
GENERAL DESCRIPTION ......................................................................................................... 4  
FEATURES................................................................................................................................. 5  
PARTS INFORMATION LIST ..................................................................................................... 6  
3.1  
Lead Free (RoHS) Parts information list......................................................................... 6  
4
5
6
7
PIN CONFIGURATIONS............................................................................................................. 7  
PIN DESCRIPTIONS .................................................................................................................. 9  
BLOCK DIAGRAM .................................................................................................................... 11  
FUNCTIONAL DESCRIPTION.................................................................................................. 12  
7.1  
7.2  
7.3  
7.4  
7.5  
7.6  
7.7  
On-Chip Flash EPROM ................................................................................................ 12  
I/O Ports........................................................................................................................ 12  
Serial I/O....................................................................................................................... 12  
Timers........................................................................................................................... 12  
Interrupts....................................................................................................................... 12  
Data Pointers ................................................................................................................ 13  
Architecture................................................................................................................... 13  
7.7.1 ALU ................................................................................................................................13  
7.7.2 Accumulator ...................................................................................................................13  
7.7.3 B Register.......................................................................................................................13  
7.7.4 Program Status Word.....................................................................................................13  
7.7.5 Scratch-pad RAM ...........................................................................................................13  
7.7.6 Stack Pointer..................................................................................................................13  
8
9
MEMORY ORGANIZATION...................................................................................................... 14  
8.1  
8.2  
Program Memory (on-chip Flash)................................................................................. 14  
Scratch-pad RAM and Register Map............................................................................ 14  
8.2.1 Working Registers ..........................................................................................................16  
8.2.2 Bit addressable Locations ..............................................................................................17  
8.2.3 Stack ..............................................................................................................................17  
SPECIAL FUNCTION REGISTERS ......................................................................................... 18  
9.1 SFR Detail Bit Descriptions .......................................................................................... 20  
10  
11  
12  
INSTRUCTION.......................................................................................................................... 35  
INSTRUCTION TIMING............................................................................................................ 43  
POWER MANAGEMENT.......................................................................................................... 44  
12.1 Idle Mode ...................................................................................................................... 44  
12.2 Power Down Mode ....................................................................................................... 44  
RESET CONDITIONS............................................................................................................... 45  
13  
13.1 Sources of reset............................................................................................................ 45  
13.1.1 External Reset..............................................................................................................45  
13.1.2 Software Reset.............................................................................................................45  
Publication Release Date: Dec 30, 2009  
- 1 -  
Revision A09  

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